AK4343EN AKM [Asahi Kasei Microsystems], AK4343EN Datasheet - Page 44
![no-image](/images/no-image-200.jpg)
AK4343EN
Manufacturer Part Number
AK4343EN
Description
Stereo DAC with HP/RCV/SPK-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
1.AK4343EN.pdf
(98 pages)
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ASAHI KASEI
The digital volume at ALC block becomes a manual mode when ALC bit is “0”. This mode is used in the case shown
below.
AVL7-0 and AVR7-0 bits set the gain of the volume control at ALC block (Table 32). The AVOL value is changed at
zero crossing or timeout. Zero crossing timeout period is set by ZTM1-0 bits.
When ALC is not used, AVL7-0 and AVR7-0 bits should be set to “ 91H” (0dB).
MS0478-E-01
Digital Volume at ALC Block (Manual Mode)
1. After exiting reset state, set-up the registers for the ALC operation (ZTM1-0, LMTH1-0 and etc)
2. When the registers for the ALC operation (Limiter period, Recovery period and etc) are changed.
For example; when the change of the sampling frequency.
AVL7-0
AVR7-0
EFH
F1H
F0H
E2H
E1H
E0H
03H
02H
01H
00H
:
:
Table 32. ALC Block Digital Volume Setting
GAIN (dB)
+35.625
+30.375
+29.625
−53.625
+35.25
−53.25
MUTE
+36.0
+30.0
−54
:
:
- 44 -
0.375dB
Step
Default
[AK4343]
2006/10
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