GAL16LV8C-15LJ LATTICE [Lattice Semiconductor], GAL16LV8C-15LJ Datasheet - Page 16

• Manufacturer Part Number: GAL16LV8C-15LJ
• Description: Low Voltage E2CMOS PLD Generic Array Logic
• Manufacturer: LATTICE [Lattice Semiconductor]

GAL16LV8D Output Load Conditions (see figure)
3-state levels are measured 0.5V from steady-state active
level.
GAL16LV8C Output Load Conditions (see figure)
GAL16LV8D: Switching Test Conditions
GAL16LV8C: Switching Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
Input Pulse Levels
Input Rise and Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
Test Condition
A
B
C
Test Condition
A
B
C
High Z to Active High at 1.9V
High Z to Active Low at 1.0V
Active High to High Z at 1.9V
Active Low to High Z at 1.0V
Active High
Active Low
Active High
Active Low
316
316
316
316
316
R
1
348
348
348
348
348
1.5ns 10% – 90%
1.5ns 10% – 90%
R
2
50
50
50
50
50
GND to 3.0V
GND to 3.0V
R
See Figure
See Figure
1
1.5V
1.5V
1.5V
1.5V
35pF
35pF
35pF
5pF
5pF
C
35pF
35pF
35pF
35pF
35pF
L
C
L
16
*C
FROM OUTPUT (O/Q)
UNDER TEST
L
INCLUDES TEST FIXTURE AND PROBE CAPACITANCE
FROM OUTPUT (O/Q)
UNDER TEST
*C
Specifications GAL16LV8
L
INCLUDES TEST FIXTURE AND PROBE CAPACITANCE
R
TEST POINT
2
+3.3V
Z
0
= 50 , C
R
1
L
= 35pF*
C *
L
TEST POINT
+1.45V
R
1