GAL16LV8C-15LJ LATTICE [Lattice Semiconductor], GAL16LV8C-15LJ Datasheet - Page 8

• Manufacturer Part Number: GAL16LV8C-15LJ
• Description: Low Voltage E2CMOS PLD Generic Array Logic
• Manufacturer: LATTICE [Lattice Semiconductor]

Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically.
In the Simple mode, macrocells are configured as dedicated inputs
or as dedicated, always active, combinatorial outputs.
Architecture configurations available in this mode are similar to the
common 10L8 and 12P6 devices with many permutations of ge-
neric output polarity or input choices.
All outputs in the simple mode have a maximum of eight product
terms that can control the logic. In addition, each output has pro-
grammable polarity.
Simple Mode
XOR
XOR
Vcc
Vcc
8
Pins 1 and 11 are always available as data inputs into the AND
array. The center two macrocells (pins 15 & 16) cannot be used
as input or I/O pins, and are only available as dedicated outputs.
The JEDEC fuse numbers including the UES fuses and PTD fuses
are shown on the logic diagram.
Combinatorial Output with Feedback Configuration
for Simple Mode
Combinatorial Output Configuration for Simple Mode
Dedicated Input Configuration for Simple Mode
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this configuration.
- All OLMC except pins 15 & 16 can be configured to
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this configuration.
- Pins 15 & 16 are permanently configured to this
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=1 defines this configuration.
- All OLMC except pins 15 & 16 can be configured to
this function.
function.
this function.
Specifications GAL16LV8