HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 296
HD6435348R
Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
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M = {(0.5 – 1/2N) – (D – 0.5)/N – (L – 0.5)F}
When D = 0.5 and F= 0
M = (0.5 –1/2
5. Note on Transmitting in Synchronous Mode: When setting up serial communication
Basic clock
Receive data
Sync sampling
Data sampling
M:
N:
D:
L:
F:
interface 1 or 2 to transmit in synchronous mode, make sure the ORER bit is cleared to 0.
Transmit operation will fail to start if the ORER bit is set to 1. The same is true in
simultaneous transmitting and receiving.
Receive margin
Ratio of basic clock to bit rate (16)
Duty factor of clock—ratio of High pulse width to Low width (0.5 to 1.0)
Frame length (9 to 12)
Absolute clock frequency deviation
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5
Figure 14-5 Sampling Timing (Asynchronous Mode)
16)
Start bit
100 [%] = 46.875%
–7.5 pulses
282
+7.5 pulses
D0
100 [%]
(1)
(2)
D1
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