24C65 MicrochipTechnology, 24C65 Datasheet - Page 11

• Manufacturer Part Number: 24C65
• Description: 64K5.0VI2CSmartSerialEEPROM
• Manufacturer: MicrochipTechnology

FIGURE 8-2:
FIGURE 8-3:
1996 Microchip Technology Inc.
Last 2 bytes
loaded into
page 0 of cache.
1 Write command initiated at byte 0 of page 3 in the array;
3 Write from cache into array initiated by STOP bit.
6
First data byte is loaded into the cache byte 0.
Page 0 of cache written to page 3 of array.
Write cycle is executed after every page is written.
page 0
page 0
Last 3 pages in cache written to next row in array.
page 1 page 2
page 1 page 2
page 0
page 0 page 1 page 2
CACHE WRITE TO THE ARRAY STARTING AT A PAGE BOUNDARY
CACHE WRITE TO THE ARRAY STARTING AT A NON-PAGE BOUNDARY
3
byte 0
cache
cache
byte 0
page 1 page 2
cache
byte 1
byte 0
cache
byte 1
cache page 0
1 Write command initiated; 64 bytes of data
loaded into cache starting at byte 2 of page 0.
byte 2
cache
byte 1
4 Write from cache into array initiated by STOP bit.
• • •
byte 0
Page 0 of cache written to page 3 of array.
Write cycle is executed after every page is written.
5
• • •
Last page in cache written to page 2 in next row.
byte 2
byte 7
cache
byte 1
byte 7
cache
page 3
byte 3
page 3
cache page 1
bytes 8-15
cache page 1
• • •
bytes 8-15
byte 4
2 64 bytes of data are loaded into cache.
byte 7
• • •
4 Remaining pages in cache are written
cache page 2
bytes 16-23
cache page 2
bytes 16-23
to sequential pages in array.
page 4
page 4
byte 7
2 Last 2 bytes loaded 'roll over'
to beginning.
page 4
page 4
• • •
• • •
• • •
5
Remaining bytes in cache are
written sequentially to array.
• • •
page 7
page 7
• • •
• • •
cache page 7
bytes 56-63
page 7
page 7
array row n
array row n + 1
cache page 7
bytes 56-63
DS21058G-page 11
24C65
array
row
n + 1
array
row n