LH28F800 Sharp Electrionic Components, LH28F800 Datasheet - Page 23
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LH28F800
Manufacturer Part Number
LH28F800
Description
8 M-bit (512 kB x 16) SmartVoltage Flash Memories
Manufacturer
Sharp Electrionic Components
Datasheet
1.LH28F800.pdf
(45 pages)
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FULL STATUS CHECK PROCEDURE
Clear Block Lock-Bits
Read Status Register
Clear Block Lock-Bits
Data (See Above)
Check if Desired
Status Register
Successful
Write D0H
Full Status
Write 60H
Complete
SR.4, 5 =
SR.7 =
SR.3 =
SR.1 =
SR.5 =
Read
Start
1
0
0
0
0
0
1
1
1
1
Clear Block Lock-Bits
Command Sequence
Device Protect Error
V
PP
Fig. 8 Clear Block Lock-Bits Flowchart
Range Error
Error
Error
- 23 -
OPERATION
OPERATION COMMAND
Write
Write
Read
Standby
Standby
Standby
Standby
Standby
Write FFH after the last clear block lock-bits operation to place
device in read array mode.
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear
Status Register command.
If error is detected, clear the status register before attempting
retry or other error recovery.
BUS
BUS
LH28F800SG-L/SGH-L (FOR TSOP, CSP)
COMMAND
Clear Block
Clear Block
Lock-Bits
Lock-Bits
Confirm
Setup
Check SR.3
1 = V
Check SR.1
1 = Device Protect Detect
WP# = V
Permanent Lock-Bit is Set
Check SR.4, 5
Both 1 = Command Sequence Error
Check SR.5
1 = Clear Block Lock-Bits Error
Data = 60H
Addr = X
Data = D0H
Addr = X
Status Register Data
Check SR.7
1 = WSM Ready
0 = WSM Busy
PP
Error Detect
IL
COMMENTS
and RP# = V
COMMENTS
IH
or