LH28F800 Sharp Electrionic Components, LH28F800 Datasheet - Page 37

• Manufacturer Part Number: LH28F800
• Description: 8 M-bit (512 kB x 16) SmartVoltage Flash Memories
• Manufacturer: Sharp Electrionic Components

6.2.6 AC CHARACTERISTICS FOR CE#-CONTROLLED WRITE OPERATIONS
NOTES :
1. In systems where CE# defines the write pulse width
2. Sampled, not 100% tested.
SYMBOL
SYMBOL
• V
• V
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AVAV
PHEL
WLEL
ELEH
PHHEH
VPEH
AVEH
DVEH
EHDX
EHAX
EHWH
EHEL
EHRL
EHGL
QVVL
QVPH
AVAV
PHEL
WLEL
ELEH
PHHEH
VPEH
AVEH
DVEH
EHDX
EHAX
EHWH
EHEL
EHRL
EHGL
QVVL
QVPH
CC
CC
(within a longer WE# timing waveform), all setup, hold,
and inactive WE# times should be measured relative to
the CE# waveform.
= 2.7 to 3.0 V, T
= 3.3±0.3 V, T
Write Cycle Time
RP# High Recovery to CE# Going Low
WE# Setup to CE# Going Low
CE# Pulse Width
RP# V
V
Address Setup to CE# Going High
Data Setup to CE# Going High
Data Hold from CE# High
Address Hold from CE# High
WE# Hold from CE# High
CE# Pulse Width High
CE# High to RY/BY# Going Low
Write Recovery before Read
V
RP# V
Write Cycle Time
RP# High Recovery to CE# Going Low
WE# Setup to CE# Going Low
CE# Pulse Width
RP# V
V
Address Setup to CE# Going High
Data Setup to CE# Going High
Data Hold from CE# High
Address Hold from CE# High
WE# Hold from CE# High
CE# Pulse Width High
CE# High to RY/BY# Going Low
Write Recovery before Read
V
RP# V
PP
PP
PP
PP
Setup to CE# Going High
Hold from Valid SRD, RY/BY# High
Setup to CE# Going High
Hold from Valid SRD, RY/BY# High
HH
HH
HH
HH
Setup to CE# Going High
Hold from Valid SRD, RY/BY# High
Setup to CE# Going High
Hold from Valid SRD, RY/BY# High
A
= 0 to +70˚C or –40 to +85
A
= 0 to +70˚C or –40 to +85
PARAMETER
PARAMETER
VERSIONS
VERSIONS
˚
C
˚
C
- 37 -
NOTE
NOTE
2, 4
2, 4
2, 4
2, 4
2
2
2
3
3
2
2
2
3
3
3. Refer to Table 3 for valid A
4. V
LH28F800SG-L/SGH-L (FOR TSOP, CSP)
word write, or lock-bit configuration.
should be held at V
word write, or lock-bit configuration success (SR.1/3/4/5 = 0).
LH28F800SGH-L70
LH28F800SGH-L70
PP
LH28F800SG-L70
LH28F800SG-L70
MIN.
MIN.
100
100
100
100
100
70
50
50
25
85
70
50
50
25
1
0
5
5
0
0
0
0
1
0
5
5
0
0
0
0
should be held at V
MAX.
MAX.
100
100
HH
) until determination of block erase,
PPH1/2/3
LH28F800SGH-L10 UNIT
LH28F800SGH-L10 UNIT
LH28F800SG-L10
LH28F800SG-L10
MIN.
MIN.
120
100
100
100
100
100
IN
70
50
50
25
70
50
50
25
1
0
5
5
0
0
0
0
1
0
5
5
0
0
0
0
and D
(and if necessary RP#
(NOTE 1)
IN
for block erase,
MAX.
MAX.
100
100
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns