XC68HC05P18A Motorola, XC68HC05P18A Datasheet - Page 57
XC68HC05P18A
Manufacturer Part Number
XC68HC05P18A
Description
HCMOS Microcontroller Unit
Manufacturer
Motorola
Datasheet
1.XC68HC05P18A.pdf
(130 pages)
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7.4 Port B
MC68HC05P18A
MOTOROLA
INTERNAL HC05
DATA BUS
WRITE $0005
WRITE $0001
READ $0005
READ $0001
Port B is a 3-bit bidirectional port that can share pins PB5–PB7 with the
serial input/output port (SIOP) communications subsystem. The port B
data register is located at address $0001 and its data direction register
(DDR) is located at address $0005. Reset does not affect the data
registers, but clears the DDRs, thereby setting all of the port pins to input
mode. Writing a 1 to a DDR bit sets the corresponding port pin to output
mode (see
Port B may be used for general I/O applications when the SIOP
subsystem is disabled. The SPE bit in register SIOP control register
(SPCR) is used to enable/disable the SIOP subsystem. When the SIOP
subsystem is enabled, port B registers are still accessible to software.
Writing to either of the port B registers while a data transfer is under way
could corrupt the data. See
(SIOP)
RESET
(RST)
for a discussion of the SIOP subsystem.
Figure 7-2. Port B I/O Circuitry
DATA DIRECTION
REGISTER BIT
REGISTER BIT
Figure
DATA
Input/Output (I/O) Ports
7-2).
Section 9. Serial Input/Output Ports
OUTPUT
Input/Output (I/O) Ports
Technical Data
I/O
PIN
Port B
57
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