MC9S12A256B ETC, MC9S12A256B Datasheet - Page 111

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MC9S12A256B

Manufacturer Part Number
MC9S12A256B
Description
device made up of standard HCS12 blocks and the HCS12 processor core
Manufacturer
ETC
Datasheet

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The relative deviation of t
number of clock periods (N).
Defining the jitter as:
For N < 100, the following equation is a good fit for the maximum jitter:
0
t
min1
t
nom
t
max1
J(N)
Figure A-4 Maximum bus clock jitter approximation
1
nom
J N
1
Freescale Semiconductor, Inc.
is at its maximum for one clock period, and decreases towards zero for larger
For More Information On This Product,
=
5
Figure A-3 Jitter Definitions
max 1
Go to: www.freescale.com
2
J N
10
t
t
-------------------- -
N t
minN
max
t
=
maxN
------- -
nom
j
1
N
3
N
+
MC9S12DP256B Device User Guide — V02.14
,
j
2
1
20
-------------------- -
N t
t
min
nom
N
N-1
N
N
111

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