M37754 Mitsubishi, M37754 Datasheet - Page 49

• Manufacturer Part Number: M37754
• Description: SINGLE-CHIP 16BIT CMOS MICROCOMPUTER
• Manufacturer: Mitsubishi

____
Transmission
Transmission is started when bit 0 (TEj flag) of UARTj Transmit/Re-
ceive control register 1 is “1”, bit 1 (TIj flag) of one is “0”, and CTSj
input is “L”. As shown in Figure 60, data is output from T
time when transmission clock CLKj changes from “H” to “L”. The data
is output from the least significant bit.
The TIj flag indicates whether the transmit buffer register is empty or
not. It is cleared to “0” when data is written in the transmit buffer reg-
ister and set to “1” when the contents of the transmit buffer register is
transferred to the transmit register.
When the transmit register becomes empty after the contents has
been transmitted, data is transferred automatically from the transmit
buffer register to the transmit register if the next transmission start
condition is satisfied. If bit 2 of UARTj Transmit/Receive control reg-
ister 0 is “1”, CTSj input is ignored, and transmission start is con-
trolled only by the TEj flag and TIj flag. Once transmission has
started, the TEj flag, TIj flag, and CTSj signals are ignored until data
transmission completes. Therefore, transmission is not interrupt
when CTSj input is changed to “H” during transmission.
The transmission start condition indicated by TEj flag, TIj flag, and
CTSj is checked while the T
Therefore, data can be transmitted continuously if the next transmis-
sion data is written in the transmit buffer register and TIj flag is
cleared to “0” before theT
Bit 3 (T
Fig. 60 Clock synchronous serial I/O timing
TI
Transmission
clock
TEj
CTS
CLK
T
T
T
ENDj
X
X
____
j
D
EPTY
X
j
j
j
EPTYj flag) of UARTj Transmit/Receive control register 0
j
____
Write in transmit buffer register
END
D
END
j signal goes “H”.
0
D
j signal (shown in Figure 60) is “H”.
____
1
D
2
D
3
1/Pf
D
4
i
D
5
(n
D
1/Pf
6
1)
M37754M8C-XXXGP, M37754M8C-XXXHP
i
D
X
Transmit register
7
Dj pin each
(n
2
1)
____
D
0
2
D
1
D
2
Transmit buffer register
D
changes to “1” at the next cycle just after the T
and changes to “0” when transmission starts. Therefore, this flag can
be used to determine whether data transmission has completed.
When the TIj flag changes from “0” to “1”, the interrupt request bit in
the UARTj transmit interrupt control register is set to “1”.
In only UART0, data can be output to a maximum of 3 external re-
ceive devices. This is realized under the condition in which the inter-
nal clock is selected and the transmission clock is output from one of
pins CLK
with CTS
clock during transmission. Figure 61 shows an external connection
example.
Plural output of transmit clock mode is set with bits 1 and 0 of the
particular function select register 1. Additionally, it is necessary to se-
lect the internal clock, disable CTS and RTS, receive and D-A output
with the UART0 Transmit/Receive mode register, UART0 Transmit/
Receive control registers 0 and 1, and A-D control register 1. Figure
62 shows the other registers bit configuration in plural output of trans-
mit clock mode and Figure 63 shows the particular function select
register 1 bit configuration .
Table 6 shows the function of the particular function select register
1’s bits 1 and 0, which is the output pin of transmit clock select bits:
TC
CLKS
put the transmit clock.
3
M37754S4CGP, M37754S4CHP
1
D
____
and TC
4
1
D
pin corresponding to the contents of TC
5
0
0
, CLKS
/RTS
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
____
D
0
6
. According to this table, select the CLK
D
0
). Make sure that do not switch the selection of the
7
0
(multiplexed with R
Stopped because TE
MITSUBISHI MICROCOMPUTERS
D
0
___
D
1
D
2
D
X
___
D
3
j
0
= “0”
D
) and CLKS
4
D
5
END
1
D
and TC
6
j signal goes “H”
D
1
7
0
(multiplexed
, CLKS
0
, and out-
0
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or