MACH5 Lattice, MACH5 Datasheet - Page 25

• Manufacturer Part Number: MACH5
• Description: Fifth Generation MACH Architecture
• Manufacturer: Lattice

M5(LV) TIMING PARAMETERS OVER OPERATING RANGES
Notes:
1. See “MACH Switching Test Circuits” documentation on the Lattice Data Book CD-ROM or Lattice web site.
2. Numbers in parentheses are for M5-128, M5-192, M5-256.
3. If a signal is used as both a clock and a logic array input, then the maximum input frequency applies (f
Frequency:
f
f
f
MAX
MAXA
MAXI
External feedback, PAL block level. Min
of 1/(t
Internal feedback, PAL block level. Min
of 1/(t
No feedback PAL block level. Min of
1/(t
External feedback, PAL block level. Min
of 1/(t
Internal feedback, PAL block level. Min
of 1/(t
No feedback, PAL block level. Min of
1/(t
Maximum input register frequency
1/(t
WLS
WLA
SIRS
WLS
WLS
WLA
WLA
+t
+ t
+ t
HIRS
+ t
+ t
+ t
+ t
WHS
WHA
WHS
WHS
WHA
WHA
) or 1/(2 x t
) or 1/(t
) or 1/(t
) or 1/(t
) or 1/(t
) or 1/(t
) or 1/(t
SS
SA
+ t
SS
SS
SA
SA
+ t
WICW
+ t
+t
HS
+ t
+t
HA
COSi
)
)
COAi
COS
)
COA
)
)
)
)
Min Max Min Max Min Max Min Max Min Max Min Max Min Max
133
182
200
111
167
167
91
-5
167
125
167
111
125
125
91
MACH 5 Family
-6
71.4
83.3
100
125
167
125
125
-7
83.3
58.8
66.7
100
125
100
100
-10
71.4
83.3
47.6
52.6
83.3
83.3
100
-12
1
(CONTINUED)
55.6
62.5
83.3
41.7
45.5
71.4
71.4
-15
MAX
/2).
45.5
50.0
83.3
35.7
38.5
62.5
62.5
-20
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
25