AM29BL802CB-120RZE AMD [Advanced Micro Devices], AM29BL802CB-120RZE Datasheet - Page 22

• Manufacturer Part Number: AM29BL802CB-120RZE
• Description: 8 Megabit (512 K x 16-Bit) CMOS 3.0 Volt-only Burst Mode Flash Memory
• Manufacturer: AMD [Advanced Micro Devices]

Command Definitions
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed.
Addresses latch on the falling edge of the WE# or CE# pulse,
whichever happens later.
Notes:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Except for the read cycle and the fourth cycle of the
4. Data bits DQ15–DQ8 are don’t cares for unlock and
5. Address bits A18–A11 are don’t cares for unlock and
6. No unlock or command cycles required when reading array
7. The Reset command is required to return to reading array
8. The fourth cycle of the autoselect command sequence is a
20
Read (Note 6)
Reset (Note 7)
Program
Unlock Bypass
Unlock Bypass Program (Note 11)
Unlock Bypass Reset (Note 12)
Chip Erase
Sector Erase
Erase Suspend (Note 13)
Erase Resume (Note 14)
Burst Mode
Burst Mode Enable
Burst Mode Disable
autoselect command sequence, all bus cycles are write
cycles.
command cycles.
command cycles, unless SA or PA required.
data.
data when device is in the autoselect mode, or if DQ5 goes
high (while the device is providing status data).
read cycle.
Manufacturer ID
Device ID, Bottom Boot Block
Sector Protect Verify (Note 9)
Burst Mode Status (Note 10)
Command
Sequence
(Note 1)
Table 4. Am29BL802C Command Definitions
1
1
4
4
4
4
4
3
2
2
6
6
1
1
4
4
Addr
XXX
XXX
XXX
XXX
XXX
555
555
555
555
555
555
555
555
555
555
RA
First
D A T A
Data
RD
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
F0
A0
90
B0
30
Am29BL802C
Addr
2AA
2AA
2AA
XXX
2AA
2AA
2AA
2AA
2AA
2AA
2AA
PA
Second
S H E E T
Data
PD
55
55
55
55
55
55
55
55
00
55
55
PD = Data to be programmed at location PA. Data latches on the
rising edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A18–A12 uniquely select any sector.
9. The data is 00h for an unprotected sector and 01h for a
10. The data is 00h if the device is in asynchronous mode and
11. The Unlock Bypass command is required prior to the Unlock
12. The Unlock Bypass Reset command is required to return to
13. The system may read and program in non-erasing sectors, or
14. The Erase Resume command is valid only during the Erase
protected sector. See “Autoselect Command Sequence” for
more information.
01h if in synchronous (burst) mode.
Bypass Program command.
reading array data when the device is in the unlock bypass
mode.
enter the autoselect mode, when in the Erase Suspend
mode. The Erase Suspend command is valid only during a
sector erase operation.
Suspend mode.
Addr
555
555
555
555
555
555
555
555
555
555
Bus Cycles (Notes 2–5)
Third
Data Addr
A0
C0
C0
90
90
90
90
20
80
80
(SA)
XXX
XXX
X00
X01
X02
X03
555
555
PA
Fourth
Data
2281
0000
0001
0000
0001
PD
AA
AA
22371C7 November 3, 2006
01
01
00
Addr Data
2AA
2AA
Fifth
55
55
Addr
555
SA
Sixth
Data
10
30