AM29DL400BB-120SF AMD [Advanced Micro Devices], AM29DL400BB-120SF Datasheet - Page 3

• Manufacturer Part Number: AM29DL400BB-120SF
• Description: 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
• Manufacturer: AMD [Advanced Micro Devices]

DISTINCTIVE CHARACTERISTICS
Am29DL400B
4 Megabit (512 K x 8-Bit/256 K x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
This product has been retired and is not recommended for designs. For new and current designs, S29AL004D supersedes Am29DL400B and is the factory-recommended migration path.
Please refer to the S29AL004D datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only.
This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data Sheet may
be revised by subsequent versions or modifications due to changes in technical specifications.
Simultaneous Read/Write operations
— Host system can program or erase in one bank,
— Zero latency between read and write
— Read-while-erase
— Read-while-program
Single power supply operation
— 2.7 to 3.6 volt read and write operations for
Manufactured on 0.32 µm process
technology
High performance
— Access times as fast as 70 ns
Low current consumption (typical
values at 5 MHz)
— 7 mA active read current
— 21 mA active read-while-program or read-
— 17 mA active program-while-erase-suspended
— 200 nA in standby mode
— 200 nA in automatic sleep mode
— Standard t
Flexible sector architecture
— Two 16 Kword, two 8 Kword, four 4 Kword, and
— Two 32 Kbyte, two 16 Kbyte, four 8 Kbyte, and
— Any combination of sectors can be erased
— Supports full chip erase
Unlock Bypass Program Command
— Reduces overall programming time when
Sector protection
— Hardware method of locking a sector to
then immediately and simultaneously read
from the other bank
operations
battery-powered applications
while-erase current
current
transition from automatic sleep mode to active
mode
six 32 Kword sectors in word mode
six 64 Kbyte sectors in byte mode
issuing multiple program command sequences
prevent any program or erase operation within
that sector
CE
chip enable access time applies to
— Sectors can be locked in-system or via
— Temporary Sector Unprotect feature allows
Top or bottom boot block configurations
available
Embedded Algorithms
— Embedded Erase algorithm automatically
— Embedded Program algorithm automatically
Minimum 1 million program/erase cycles
guaranteed per sector
20-year data retention at 125° C
— Reliable operation for the life of the system
Package options
— 44-pin SO
— 48-pin TSOP
Compatible with JEDEC standards
— Pinout and software compatible with
— Superior inadvertent write protection
Data# Polling and Toggle Bits
— Provides a software method of detecting
Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or
Erase Suspend/Erase Resume
— Suspends or resumes erasing sectors to allow
— No need to suspend if sector is in the other
Hardware reset pin (RESET#)
— Hardware method of resetting the device to
programming equipment
code changes in previously locked sectors
pre-programs and erases sectors or entire chip
programs and verifies data at specified address
single-power-supply flash standard
program or erase cycle completion
erase cycle completion
reading and programming in other sectors
bank
reading array data
Publication# 21606
Issue Date: June 7, 2005
Rev: E Amendment/+4