EVAL-AD1896EB AD [Analog Devices], EVAL-AD1896EB Datasheet - Page 22

• Manufacturer Part Number: EVAL-AD1896EB
• Description: AD1896 7.75:1 to 1:8, 192 kHz Stereo ASRC Evaluation Board
• Manufacturer: AD [Analog Devices]

EVAL-AD1896EB
// IO control logic
// AD1896 ASRC Input Serial port signals
(SPDIF_DDI));
(!SPDIF_DDI));
(SPDIF_DDI));
// Internal node signals
(!SPDIF_DDI))
(BOTH_SLAVE#MATCH_PHASE#O_MAS_768#O_MAS_512#O_MAS_256) & (SPDIF_DDI)))
(BOTH_SLAVE#MATCH_PHASE#O_MAS_768#O_MAS_512#O_MAS_256) & (SPDIF_DDI));
(!SPDIF_DDI))
(SPDIF_DDI))
"====================================================================================
END IF_Logic
SCLK_I
LRCLK_I
SDATA_I
ISCLK
ILRCLK
I_SDATA
DDI_SCLK
DDI_LRCLK
DIR_FSYNC
DDI_SCLK.oe
DDI_LRCLK.oe
DIR_FSYNC.oe
DIR_SCLK.oe
SCLK_I.oe
LRCLK_I.oe
DIR_SCLK
= ((DDI_SCLK) & (BOTH_SLAVE#MATCH_PHASE#O_MAS_768#O_MAS_512#O_MAS_256) &
= ((DDI_LRCLK) & (BOTH_SLAVE # MATCH_PHASE#O_MAS_768#O_MAS_512#O_MAS_256) &
= (DDI_SDATA & !SPDIF_DDI) # (DIR_SDATA & SPDIF_DDI);
# ((LJ#RJ24#RJ20) & ((DIR_SCLK) &
# ((SCLK_I) & (IN_MAS_768 # IN_MAS_512 # IN_MAS_256))
# ((I2S # RJ18 # RJ16) & (DIR_SCLK) &
# ((DIR_FSYNC) & (BOTH_SLAVE # MATCH_PHASE#O_MAS_768#O_MAS_512#O_MAS_256) &
# ((LRCLK_I) & (IN_MAS_768 # IN_MAS_512 # IN_MAS_256));
= ((LJ # RJ24 # RJ20 # RJ18 # RJ16 # I2S) & (ISCLK) & (!SPDIF_DDI))
= (SPDIF_DDI & DIR_FSYNC) # (((I2S & !DDI_LRCLK) # (!I2S & DDI_LRCLK)) &
= (DDI_SDATA & !SPDIF_DDI) # (((LJ#RJ24#RJ20#RJ18#RJ16#I2S)&(DIR_SDATA)) &
= (IN_MAS_768 # IN_MAS_512 # IN_MAS_256);
= (IN_MAS_768 # IN_MAS_512 # IN_MAS_256);
= (IN_MAS_768 # IN_MAS_512 # IN_MAS_256);
= (IN_MAS_768 # IN_MAS_512 # IN_MAS_256);
= (BOTH_SLAVE # MATCH_PHASE # O_MAS_768 # O_MAS_512 # O_MAS_256);
= (BOTH_SLAVE # MATCH_PHASE # O_MAS_768 # O_MAS_512 # O_MAS_256);
= ISCLK;
= ILRCLK;
= ((!ISCLK) & (LJ # RJ24 # RJ20 # RJ18 # RJ16)) # (ISCLK & I2S);
= ILRCLK;
# ((((LJ # RJ24 # RJ20) & (!ISCLK)) # ((I2S # RJ18 # RJ16) & (ISCLK))) &
in_pld.abl