AM29F002NB AMD [Advanced Micro Devices], AM29F002NB Datasheet
AM29F002NB
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AM29F002NB Summary of contents
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... Am29F002B/Am29F002NB Data Sheet July 2003 The following document specifies Spansion memory products that are now offered by both Advanced Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig- inally developed the specification, these products will be offered to customers of both AMD and Fujitsu ...
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... Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation Hardware reset pin (RESET#) — Hardware method to reset the device to reading array data (not available on Am29F002NB) Publication# 21527 Rev: D Amendment/0 Issue Date: November 28, 2000 ...
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... The Am29F002B Family consists of 2 Mbit, 5.0 volt-only Flash memory devices organized as 262,144 bytes. The Am29F002B offers the RESET# function, the Am29F002NB does not. The data appears on DQ7–DQ0. The device is offered in 32-pin PLCC, 32-pin TSOP, and 32-pin PDIP packages. This device is designed to be programmed in-system with the stan- dard system 5 ...
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... Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 8 Table 1. Am29F002B/Am29F002NB Device Bus Operations . . . . . .8 Requirements for Reading Array Data . . . . . . . . . . . . . . . . . . 8 Writing Commands/Command Sequences . . . . . . . . . . . . . . . 8 Program and Erase Operation Status . . . . . . . . . . . . . . . . . . . 8 Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 RESET#: Hardware Reset Pin . . . . . . . . . . . . . . . . . . . . . . . . 9 Output Disable Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 2 ...
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... V = 5.0 V ± 10% CC Max access time ACC Max CE# access time Max OE# access time Note: See “AC Characteristics” for full specifications. BLOCK DIAGRAM RESET# n/a Am29F002NB State WE# Control Command Register CE# OE# V Detector CC A0–A17 4 Am29F002B/Am29F002NB -55 - ...
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... DQ0 Standard TSOP Am29F002B/Am29F002NB NC on Am29F002NB A14 29 A13 PLCC A11 25 OE# 24 A10 23 CE# 22 DQ7 ...
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... A0–A17 = 18 addresses DQ0–DQ7 = 8 data inputs/outputs CE# = Chip enable OE# = Output enable WE# = Write enable RESET# = Hardware reset pin, active low (not available on Am29F002NB +5.0 V single power supply CC (see Product Selector Guide for device speed ratings and voltage supply tolerances Device ground Pin not connected internally ...
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... AM29F002BT-55 PC, AM29F002BB-55 JC, JI, AM29F002NBT-55 EC, EI AM29F002NBB-55 AM29F002BT-70 PC, PI, AM29F002BB-70 JC, JI, AM29F002NBT-70 EC, EI AM29F002NBB-70 AM29F002BT-90 AM29F002BB-90 AM29F002NBT-90 PC, PI, PE, AM29F002NBB-90 JC, JI, JE, AM29F002BT-120 EC, EI, EE AM29F002BB-120 AM29F002NBT-120 AM29F002NBB-120 November 28, 2000 TEMPERATURE RANGE C = Commercial ( + Industrial (– + Extended (– +125 C) PACKAGE TYPE ...
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... L = Logic Low = VIL Logic High = VIH, VID = 12.0 ± 0 Don’t Care, DIN = Data In, DOUT = Data Out, A Note: See the sections on Sector Group Protection and Temporary Sector Unprotect for more information. This function requires the RESET# pin and is therefore not available on the Am29F002NB device. Requirements for Reading Array Data ...
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... V .) The device enters IH the TTL standby mode when CE# and RESET# pins (CE# only on the Am29F002NB) are both held at V The device requires standard access time (t read access when the device is in either of these standby modes, before it is ready to read data. ...
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... Table 3. Am29F002B/Am29F002NB Bottom Boot Block Sector Address Table Sector A17 A16 SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 1 SA5 1 0 SA6 1 1 Autoselect Mode The autoselect mode provides manufacturer and device identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This ...
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... ID control pins. Details on this method are provided in the (Am29F002B) and 21183 (Am29F002NB). Contact an AMD representative to obtain a copy of the appropriate document. The device is shipped with all sectors unprotected. ...
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... When the Embedded Program algorithm is complete, the device then returns to reading array data and addresses are no longer latched. The system can determine the status of the program operation by using Am29F002B/Am29F002NB on address bit A9. ID November 28, 2000 ...
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... The time between these additional cycles must be less than 50 µs, otherwise the last address and command might not be accepted, and erasure may begin recom- mended that processor interrupts be disabled during this time to ensure all commands are accepted. The Am29F002B/Am29F002NB 13 ...
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... Command Sequence from System No Data = FFh? Erasure Completed Notes: 1. See the appropriate Command Definitions table for erase command sequence. 2. See “DQ3: Sector Erase Timer” for more information. Figure 3. Erase Operation Am29F002B/Am29F002NB START Data Poll Embedded Erase algorithm in progress Yes November 28, 2000 ...
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... The system must write the Erase Resume command (address bits are “don’t care”) to exit the erase suspend mode and continue the sector erase operation. Further writes of the Resume command are ignored. Another Erase Suspend command can be written after the device has resumed erasing. Am29F002B/Am29F002NB 15 ...
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... Command Definitions Table 5. Am29F002B/Am29F002NB Command Definitions Command Sequence (Note 1) Read (Note 5) 1 Reset (Note 6) 1 Manufacturer ID 4 Device ID, 4 Top Boot Block Auto- select Device ID, 4 (Note 7) Bottom Boot Block Sector Protect Verify 4 (Note 8) Program 4 Chip Erase 6 Sector Erase 6 Erase Suspend (Note 9) ...
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... During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously with DQ5. Figure 4. Data# Polling Algorithm Am29F002B/Am29F002NB Yes No Yes Yes No ...
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... DQ5: Exceeded Timing Limits DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit. Under these conditions DQ5 produces a “1.” This is a failure condition that indicates the program or erase cycle was not successfully completed. Am29F002B/Am29F002NB November 28, 2000 ...
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... Complete, Write Reset Command Notes: 1. Read toggle bit twice to determine whether or not it is toggling. See text. 2. Recheck toggle bit because it may stop toggling as DQ5 changes to “1”. See text. Figure 5. Toggle Bit Algorithm Am29F002B/Am29F002NB (Note 1) No Yes Yes (Notes Yes ...
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... DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. See “DQ5: Exceeded Timing Limits” for more information. 20 Table 6. Write Operation Status DQ7 (Note 1) DQ6 DQ7# Toggle 0 Toggle 1 No toggle Data Data DQ7# Toggle Am29F002B/Am29F002NB DQ5 DQ2 (Note 2) DQ3 (Note 1) 0 N/A No toggle 0 1 Toggle 0 N/A Toggle Data Data ...
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... ns. See Figure 6. Maximum DC input voltage on pin A9 is +12.5 V which may overshoot to +13.5 V for periods ns. (RESET# is not available on Am29F002NB more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second. ...
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... OL V Output High Voltage OH V Low V Lock-Out Voltage LKO CC Notes: 1. RESET# is not available on Am29F002NB. 2. Maximum I specifications are tested with The I current listed is typically less than 2 mA/MHz, with OE active while Embedded Erase or Embedded Program is in progress Not 100% tested. ...
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... OH1 Output High Voltage V OH2 V Low V Lock-Out Voltage LKO CC Notes: 1. RESET# is not available on Am29F002NB. 2. Maximum I specifications are tested with The I current listed is typically less than 2 mA/MHz, with OE active while Embedded Erase or Embedded Program is in progress Not 100% tested. ...
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... Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Am29F002B/Am29F002NB All -55 others Unit 1 TTL gate L 30 100 0.0– ...
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... Output Hold Time From Addresses, CE AXQX OH or OE#, Whichever Occurs First (Note 1) Notes: 1. Not 100% tested. 2. See Table 7 and Figure 8 for test specifications. Addresses CE# OE# WE# Outputs RESET# n/a Am29F002NB November 28, 2000 Test Setup CE Max OE OE Max IL Max Max Max Read ...
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... RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# Pulse Width RP t RESET# High Time Before Read (See Note) RH Note: Not 100% tested. RESET# is not available on Am29F002NB. CE#, OE# RESET# n/a Am29F002NB RESET# n/a Am29F002NB 26 Test Setup Max Max Min ...
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... Not 100% tested. 2. See the “Erase and Programming Performance” section for more information. November 28, 2000 Min Min Min Min Min Min Min Min Min Min Min Typ Typ Min Am29F002B/Am29F002NB Speed Options -55 -70 -90 -120 Unit 120 ...
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... VCS Notes program address program data WPH A0h is the true data at the program address. OUT Figure 11. Program Operation Timings Am29F002B/Am29F002NB Read Status Data (last two cycles WHWH1 Status D OUT November 28, 2000 ...
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... SA = sector address (for Sector Erase Valid Address for reading status data (”see “Write Operation Status”). Figure 12. Chip/Sector Erase Operation Timings November 28, 2000 555h for chip erase WPH t DH 55h 30h 10 for Chip Erase Am29F002B/Am29F002NB Read Status Data WHWH2 In Complete Progress 29 ...
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... Figure 14. Toggle Bit Timings (During Embedded Algorithms Complement Complement Status Data Status Data Valid Status Valid Status (first read) (second read) Am29F002B/Am29F002NB VA High Z True Valid Data High Z True Valid Data VA VA Valid Status Valid Data (stops toggling) November 28, 2000 ...
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... Figure 16. Temporary Sector Unprotect Timing Diagram (Am29F002B only) November 28, 2000 Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 15. DQ2 vs. DQ6 Min Min Program or Erase Command Sequence t RSP Am29F002B/Am29F002NB Erase Resume Erase Erase Complete Read All Speed Options 500 VIDR Unit ns µ ...
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... WHWH2 WHWH2 1. Not 100% tested. 2. See the “Erase and Programming Performance” section for more information. 32 Min Min Min Min Min Min Min Min Min Min Min Typ Typ Am29F002B/Am29F002NB Speed Options -55 -70 -90 -120 Unit 120 ...
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... November 28, 2000 PA for program SA for sector erase 555 for chip erase Data# Polling GHEL t t WHWH1 CPH for program PD for program 55 for erase 30 for sector erase 10 for chip erase Am29F002B/Am29F002NB PA DQ7# D OUT = data written to device. OUT 33 ...
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... A 34 Typ (Note 1) Max (Note 300 1.8 5.4 = 4.5 V (4.75 V for ±5% devices), 1,000,000 cycles. CC –1.0 V –1.0 V –100 mA = 5.0 V, one pin at a time. RESET# not available on Am29F002NB. CC Test Setup OUT V IN Am29F002B/Am29F002NB Unit Comments s Excludes 00h programming prior to erasure (Note 4) s µs ...
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... Sampled, not 100% tested. 2. Test conditions 1.0 MHz. A DATA RETENTION Parameter Minimum Pattern Data Retention Time November 28, 2000 Test Conditions OUT Test Conditions 150 C 125 C Am29F002B/Am29F002NB Typ Max Unit Min Unit 10 Years 20 Years 35 ...
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... PHYSICAL DIMENSIONS PD 032—32-Pin Plastic DIP 36 Am29F002B/Am29F002NB Dwg rev AD; 10/99 November 28, 2000 ...
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... PHYSICAL DIMENSIONS (continued) PL 032—32-Pin Plastic Leaded Chip Carrier November 28, 2000 Am29F002B/Am29F002NB Dwg rev AH; 10/99 37 ...
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... PHYSICAL DIMENSIONS (continued) TS 032—32-Pin Standard Thin Small Package 38 Am29F002B/Am29F002NB Dwg rev AA; 10/99 November 28, 2000 ...
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... Replaced figures with more detailed illustrations. Revision D (November 28, 2000) Global Added table of contents. Ordering Information Deleted burn-in option. Table 5, Command Definitions In Note 4, changed the lower address bit of don’t care range to A11. Am29F002B/Am29F002NB : Added Note 2 “Maximum I CC4 ”. CC CCmax : Added Note 2 “Maximum I ...