AM29LV640MH SPANSION [SPANSION], AM29LV640MH Datasheet - Page 23
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AM29LV640MH
Manufacturer Part Number
AM29LV640MH
Description
64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control
Manufacturer
SPANSION [SPANSION]
Datasheet
1.AM29LV640MH.pdf
(62 pages)
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Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to Tables
for command definitions). In addition, the following
hardware data protection measures prevent accidental
erasure or programming, which might otherwise be
caused by spurious system level signals during V
power-up and power-down transitions, or from system
noise.
Low V
When V
cept any write cycles. This protects data during V
power-up and power-down. The command register
and all internal program/erase circuits are disabled,
and the device resets to the read mode. Subsequent
writes are ignored until V
system must provide the proper signals to the control
COMMON FLASH MEMORY INTERFACE (CFI)
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
handshake, which allows specific vendor-specified
software algorithms to be used for entire families of
devices. Software support can then be device-inde-
pendent, JEDEC ID-independent, and forward- and
backward-compatible for the specified flash device
families. Flash vendors can standardize their existing
interfaces for long-term compatibility.
This device enters the CFI Query mode when the sys-
tem writes the CFI Query command, 98h, to address
December 14, 2005
CC
CC
Write Inhibit
is less than V
LKO
CC
, the device does not ac-
is greater than V
Figure 3. SecSi Sector Protect Verify
Write 40h to SecSi
Read from SecSi
Sector address
A1 = 1, A0 = 0
A1 = 1, A0 = 0
Sector address
Write 60h to
with A6 = 0,
with A6 = 0,
any address
RESET# =
Wait 1 ms
V
10
IH
D A T A S H E E T
START
LKO
or V
and
Am29LV640MH/L
. The
ID
11
CC
CC
Remove V
pins to prevent unintentional writes when V
greater than V
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE#
or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
CE# and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE# = V
the device does not accept commands on the rising
edge of WE#. The internal state machine is automati-
cally reset to the read mode on power-up.
55h, any time the device is ready to read array data.
The system can read CFI information at the addresses
given in Tables 6–9. To terminate reading CFI data,
the system must write the reset command.
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
CFI data at the addresses given in Tables 6–9. The
system must write the reset command to return the
device to reading array data.
If data = 00h,
SecSi Sector is
If data = 01h,
SecSi Sector is
IL
from RESET#
Protect Verify
unprotected.
SecSi Sector
Write reset
, CE# = V
protected.
command
complete
IH
or V
IH
ID
LKO
or WE# = V
.
IL
and OE# = V
IH
. To initiate a write cycle,
IH
during power up,
CC
21
is