AM29LV640MH SPANSION [SPANSION], AM29LV640MH Datasheet - Page 32

• Manufacturer Part Number: AM29LV640MH
• Description: 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control
• Manufacturer: SPANSION [SPANSION]

Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase
command sequence is initiated by writing two unlock
cycles, followed by a set-up command. Two additional
unlock write cycles are then followed by the chip erase
command, which in turn invokes the Embedded Erase
algorithm. The device does not require the system to
preprogram prior to erase. The Embedded Erase algo-
rithm automatically preprograms and verifies the entire
memory for an all zero data pattern prior to electrical
erase. The system is not required to provide any con-
trols or timings during these operations. Tables
11
chip erase command sequence.
When the Embedded Erase algorithm is complete, the
device returns to the read mode and addresses are no
longer latched. The system can determine the status
of the erase operation by using DQ7, DQ6, or DQ2.
Refer to the
mation on these status bits.
Any commands written during the chip erase operation
are ignored. However, note that a hardware reset im-
30
show the address and data requirements for the
Write Operation Status
No
Figure 6. Program Suspend/Program Resume
Sequence in Progress
Program Operation
Write address/data
Write address/data
Program Suspend
or Write-to-Buffer
operation prior to
Device reverts to
Read data as
section for infor-
Wait 15 μs
XXXh/B0h
XXXh/30h
reading?
required
Done
Yes
D A T A S H E E T
10
Am29LV640MH/L
and
Write Program Suspend
Command Sequence
Command is also valid for
Erase-suspended-program
operations
Autoselect and SecSi Sector
read operations are also allowed
Data cannot be read from erase- or
program-suspended sectors
Write Program Resume
Command Sequence
mediately terminates the erase operation. If that oc-
curs, the chip erase command sequence should be
reinitiated once the device has returned to reading
array data, to ensure data integrity. Note that the
SecSi Sector, autoselect, and CFI functions are un-
available when an erase operation is in progress.
Figure 7 illustrates the algorithm for the erase opera-
tion. Refer to the
bles in the AC Characteristics section for parameters,
and Figure 19 section for timing diagrams.
Sector Erase Command Sequence
Sector erase is a six bus cycle operation. The sector
erase command sequence is initiated by writing two
unlock cycles, followed by a set-up command. Two ad-
ditional unlock cycles are written, and are then fol-
lowed by the address of the sector to be erased, and
the sector erase command. Tables
address and data requirements for the sector erase
command sequence.
The device does not require the system to preprogram
prior to erase. The Embedded Erase algorithm auto-
matically programs and verifies the entire memory for
Erase and Program Operations
December 14, 2005
10
and
11
show the
ta-