MM74HCT373N Fairchild Semiconductor, MM74HCT373N Datasheet

IC LATCH OCTAL D 3 STATE 20-DIP

MM74HCT373N

Manufacturer Part Number
MM74HCT373N
Description
IC LATCH OCTAL D 3 STATE 20-DIP
Manufacturer
Fairchild Semiconductor
Series
74HCTr
Datasheet

Specifications of MM74HCT373N

Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
25ns
Current - Output High, Low
7.2mA, 7.2mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Number Of Circuits
8
Logic Family
74HCT
Polarity
Non-Inverting
Input Bias Current (max)
1000 uA
High Level Output Current
- 7.2 mA
Low Level Output Current
7.2 mA
Propagation Delay Time
40 ns at 5 V
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MM74HCT373N
Manufacturer:
AT
Quantity:
280
Part Number:
MM74HCT373N
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
© 2005 Fairchild Semiconductor Corporation
MM74HCT373WM
MM74HCT373SJ
MM74HCT373MTC
MM74HCT373N
MM74HCT374WM
MM74HCT374SJ
MM74HCT374MTC
MM74HCT374N
MM74HCT373 • MM74HCT374
3-STATE Octal D-Type Latch •
3-STATE Octal D-Type Flip-Flop
General Description
The
MM74HCT374 Octal D-type flip flops advanced silicon-gate
CMOS technology, which provides the inherent benefits of
low power consumption and wide power supply range, but
are LS-TTL input and output characteristic & pin-out com-
patible. The 3-STATE outputs are capable of driving 15 LS-
TTL loads. All inputs are protected from damage due to
static discharge by internal diodes to V
When the MM74HCT373 LATCH ENABLE input is HIGH,
the Q outputs will follow the D inputs. When the LATCH
ENABLE goes LOW, data at the D inputs will be retained at
the outputs until LATCH ENABLE returns HIGH again.
When a high logic level is applied to the OUTPUT CON-
TROL input, all outputs go to a high impedance state,
regardless of what signals are present at the other inputs
and the state of the storage elements.
The MM74HCT374 are positive edge triggered flip-flops.
Data at the D inputs, meeting the setup and hold time
requirements, are transferred to the Q outputs on positive
going transitions of the CLOCK (CK) input. When a high
logic level is applied to the OUTPUT CONTROL (OC)
input, all outputs go to a high impedance state, regardless
of what signals are present at the other inputs and the state
of the storage elements.
MM74HCT devices are intended to interface between TTL
and NMOS components and standard CMOS devices.
These parts are also plug in replacements for LS-TTL
devices and can be used to reduce power consumption in
existing designs.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Order Number
MM74HCT373
Package Number
octal
MTC20
MTC20
M20B
M20D
M20B
M20D
N20A
N20A
D-type
CC
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
and ground.
latches
DS005367
and
Features
TTL input characteristic compatible
Typical propagation delay: 20 ns
Low input current: 1
Low quiescent current: 80
Compatible with bus-oriented systems
Output drive capability: 15 LS-TTL loads
Package Descriptions
P
A maximum
P
A maximum
February 1984
Revised May 2005
www.fairchildsemi.com

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MM74HCT373N Summary of contents

Page 1

... M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT373MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HCT373N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide MM74HCT374WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide ...

Page 2

Connection Diagrams Top View MM74HCT373 Truth Tables MM74HCT373 Output LE Data Control HIGH Level L LOW Level Q Level of output before steady-state input conditions were established. ...

Page 3

Logic Diagrams MM74HCT373 MM74HCT374 3 www.fairchildsemi.com ...

Page 4

Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Output Voltage (V ) OUT Clamp Diode Current ( Output Current, per pin (I ) ...

Page 5

AC Electrical Characteristics 5.0V MM74HCT373 Symbol Parameter Maximum Propagation Delay PHL PLH Data to Output Maximum Propagation Delay PHL PLH Latch Enable to ...

Page 6

AC Electrical Characteristics 5.0V MM74HCT374 Symbol Parameter f Maximum Clock Frequency MAX Maximum Propagation Delay PHL PLH to Output Maximum Enable Propagation Delay PZH ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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