AK4632VN AKM [Asahi Kasei Microsystems], AK4632VN Datasheet - Page 21

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AK4632VN

Manufacturer Part Number
AK4632VN
Description
16-Bit ?? Mono CODEC with ALC & MIC/SPK/Video-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

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AK4632VN-L
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ASAHI KASEI
There are the following four clock modes to interface with external devices. (See Table 1 and Table 2)
Mode
PLL Master Mode
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
PLL Slave Mode 2
(PLL Reference Clock: FCK or BICK pin)
EXT Slave Mode
Invalid state (Note 36)
Note 36. If this mode is selected, the invalid clocks are output from MCKO, FCK and BICK pins.
Mode
PLL Master Mode
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
PLL Slave Mode 2
(PLL Reference Clock: FCK or BICK pin)
EXT Slave Mode
[Pull-down resistor of MCKI pin]
When the master clock is input, MCKPD bit should be “0”. When the MCKI pin is floating, the pin should be pulled-down
by internal 25kΩ resistor at MCKPD bit = “1”(Default).
MS0396-E-00
System Clock
Note 37. 11.2896MHz/12MHz/12.288MHz/13.5MHz/24MHz/27MHz
MCKI
Table 1. Clock Mode Setting (X: Don’t care)
Figure 18. Pull-down resistor of MCKI pin
Table 2. Clock pins state in Clock Mode
MCKO bit
OPERATION OVERVIEW
PMPLL bit
0
1
0
1
0
0
1
1
1
0
0
25kΩ
MCKPD bit ="0"
- 21 -
256fs Output
256fs Output
MCKO pin
“L” Output
“L” Output
“L” Output
“L” Output
M/S bit
1
0
0
0
1
AK4632
See Table 4
See Table 4
See Table 4
PLL3-0 bit
Input for PLL
Input for PLL
Master Clock
Master Clock
MCKI pin
(Note 37)
(Note 37)
X
X
1024fs
256fs/
512fs/
GND
Input
MCKPD bit
16fs/32fs/64fs
16fs/32fs/64fs
16fs/32fs/64fs
X
0
0
1
0
BICK pin
Output
≥ 32fs
Input
Input
Input
Figure 19
Figure 20
Figure 21
Figure 22
Figure
-
FCK pin
Output
[AK4632]
Input
Input
Input
1fs
1fs
1fs
1fs
2005/06

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