AK4632VN AKM [Asahi Kasei Microsystems], AK4632VN Datasheet - Page 23

• Manufacturer Part Number: AK4632VN
• Description: 16-Bit ?? Mono CODEC with ALC & MIC/SPK/Video-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
1) PLL Master Mode (PMPLL bit = “1”, M/S bit = “1”)
In this mode, irregular frequency clocks are output from FCK, BICK and MCKO pins after PMPLL bit = “0”
sampling frequency is changed. After that PLL is unlocked, BICK and FCK pins output “L” for a moment, and invalid
frequency clock is output from MCKO pin at MCKO bit = “1”. If MCKO bit is “0”, MCKO pin is output to “L”. (See
Table 7)
After the PLL is locked, a first period of FCK and BICK may be invalid clock, but these clocks return to normal state after
a period of 1/fs.
2) PLL Slave Mode (PMPLL bit = “1”, M/S bit = “0”)
In this mode, an invalid clock is output from MCKO pin after PMPLL bit = “0”
After that, 256fs is output from MCKO pin when PLL is locked. ADC and DAC output invalid data when the PLL is
unlocked. For DAC, the output signal should be muted by writing “0” to DACA and DACM bits in Addr=02H.
MS0396-E-00
PLL State
After that PMPLL bit “0”
PLL Unlock
PLL Lock
When PLL2 bit is “0” (PLL reference clock input is FCK or BICK pin), the sampling frequency is selected by FS3,
FS1-0 bits. (See Table 6)
PLL Unlock State
Others
Mode
0
1
2
3
6
7
Table 7. Clock Operation at PLL Master Mode (PMPLL bit = “1”, M/S bit = “1”)
Table 6. Setting of Sampling Frequency at PLL2 bit = “0” and PMPLL bit = “1”
Table 8. Clock Operation at PLL Slave Mode (PMPLL bit = “1”, M/S bit = “0”)
PLL State
After that PMPLL bit “0”
PLL Unlock
PLL Lock
FS3 bit
0
0
0
0
1
1
“1”
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
FS2 bit
MCKO bit = “0”
“L” Output
“L” Output
“L” Output
Others
FS1 bit
MCKO pin
“1”
0
0
1
1
1
1
- 23 -
MCKO bit = “1”
MCKO bit = “0”
256fs Output
FS0 bit
“L” Output
“L” Output
“L” Output
Invalid
Invalid
0
1
0
1
0
1
Sampling Frequency Range
MCKO pin
12kHz < fs ≤ 16kHz
16kHz < fs ≤ 24kHz
24kHz < fs ≤ 32kHz
32kHz < fs ≤ 48kHz
8kHz < fs ≤ 12kHz
7.35kHz ≤ fs ≤ 8kHz
MCKO bit = “1”
See Table 9
“L” Output
BICK pin
“1” or sampling frequency is changed.
256fs Output
Invalid
N/A
Invalid
Invalid
“L” Output
1fs Output
FCK pin
Invalid
Default
[AK4632]
2005/06
“1” or