AK4632VN AKM [Asahi Kasei Microsystems], AK4632VN Datasheet - Page 55

• Manufacturer Part Number: AK4632VN
• Description: 16-Bit ?? Mono CODEC with ALC & MIC/SPK/Video-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
Figure 45 shows the system connection diagram. An evaluation board [AKD4632] is available which demonstrates the
optimum layout, power supply arrangements and measurement results.
MS0396-E-00
Others
Analog Supply
2.6∼3.6V
Analog Supply
2.8∼5.25V
Mode
12
13
0
1
2
3
4
5
6
7
Notes:
- AVSS, DVSS and SVSS of the AK4632 should be distributed separately from the ground of external
- The exposed pad on the bottom surface of the package must be open.
- All digital input pins except pull-down pin should not be left floating.
- Value of R and C of BEEP pin should depend on system.
- When the AK4632 is EXT mode (PMPLL bit = “0”), a resistor and capacitor of VCOC pin is not needed.
- When the AK4632 is PLL mode (PMPLL bit = “1”), a resistor and capacitor of VCOC pin is shown in Table 45.
- Input resistance of AIN pin and Capacitance between MICOUT pin and AIN pin compose of HPF. When the
controllers.
capacitance is 0.22µF, the cut off frequency is typ.72Hz(typ)(min. 48Hz, max. 145Hz).
PLL3
bit
0
0
0
1
0
0
0
0
0
1
Others
PLL2
SAGC1-0 bits = “00”
SAGC1-0 bits = “10” or “11”
bit
Cv : Short
Cs : Short
Cv=100µF & Cs=2.2µF
Cv=47µF & Cs=1.0µF
0
0
0
0
1
1
1
1
1
1
10µ
10µ
or
75
+
+
PLL1
bit
0
0
1
1
0
0
1
1
0
0
10µ
Table 45. Setting of PLL Mode (*fs: Sampling Frequency)
0.1µ
0.1µ
Cp Rp
0.1u
Cv
Cs
PLL0
bit
0
1
0
1
0
1
0
1
0
1
0.1µ
Figure 45. Typical Connection Diagram
1
2
3
4
5
6
7
8
VCOC
AVDD
AVSS
VVDD
VIN
VOUT
VSAG
PDN
10
Clock Input Pin
PLL Reference
MCKI pin
MCKI pin
MCKI pin
MCKI pin
MCKI pin
MCKI pin
BICK pin
BICK pin
BICK pin
FCK pin
2.2k
DSP or µP
N/A
SYSTEM DESIGN
1µ
Top View
- 55 -
0.22µ
11.2896MHz
12.288MHz
Frequency
13.5MHz
12MHz
24MHz
27MHz
C
R
Input
16fs
32fs
64fs
1fs
220
1µ
20k
+
MCKO
SVDD
SVSS
DVSS
MCKI
Rp[Ω]
SPN
SPP
MIN
6.8k
10k
10k
10k
10k
10k
10k
10k
10k
10k
Rp and Cp of
0.1µ
10µ
VCOC pin
0.1µ
24
23
22
21
20
19
18
17
R1
0.1µ
Cp[F]
220n
4.7n
4.7n
4.7n
4.7n
4.7n
4.7n
4.7n
10n
10n
ZD2
R2
+
10µ
Dynamic SPK :
Peizo SPK :
PLL Lock
R1,R2 : Short
ZD1,ZD2 : Open
R1,R2 : 10Ω
ZD1,ZD2 : Required
ZD1
160ms
(max)
40ms
40ms
40ms
40ms
40ms
40ms
Time
2ms
2ms
2ms
Analog Supply
2.6∼5.25V
Speaker
[AK4632]
2005/06
Default