AK4632VN AKM [Asahi Kasei Microsystems], AK4632VN Datasheet - Page 59

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AK4632VN

Manufacturer Part Number
AK4632VN
Description
16-Bit ?? Mono CODEC with ALC & MIC/SPK/Video-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AK4632VN-L
Manufacturer:
AK
Quantity:
111
ASAHI KASEI
MS0396-E-00
Power Supply
(Addr:00H, D6)
(Addr:01H, D2)
(Addr:01H, D1)
(Addr:01H, D0)
PMVCM bit
MCKPD bit
MCKO pin
3. When the external clock (MCKI pin) is used in PLL Slave Mode.
PMPLL bit
<Example>
MCKO bit
MCKI pin
BICK pin
FCK pin
PDN pin
(1) After Power Up: PDN pin “L” → “H”
(2) DIF1-0, PLL3-0, FS3-0, BCKO1-0, MSBS, BCKP and M/S bits should be set during this period.
(3) Power Up VCOM: PMVCM bit = “0” → “1”
(4) Release the pull-down resistor of the MCKI pin: MCKPD bit = “1” → “0”
(5) Enable MCKO output: MCKO bit = “1”
(6) PLL starts after the PMPLL bit changes from “0” to “1” and PLL reference clock (MCKI pin) is supplied. PLL
(7) The normal clock is output from MCKO after PLL is locked.
(8) The invalid frequency is output from MCKO during this period.
(9) BICK and FCK clocks should be synchronized with MCKO clock.
lock time is 40ms(max).
“L” time (1) of 150ns or more is needed to reset the AK4632.
VCOM should first be powered up before the other block operates.
(1)
(2)
(3)
(4)
(5)
(6)
Figure 48. Clock Set Up Sequence (3)
40msec(max)
(8)
Input
(7)
(9)
- 59 -
Output
Input
Example:
Audio I/F Format: DSP Mode, BCKP = MSBS = “0”
(1) Power Supply & PDN pin = “L”
Input Master Clock Select at PLL Mode: 11.2896MHz
Sampling Frequency:8kHz
MCKO : Enable
BICK frequency at Master Mode: 64fs
BICK and FCK input start
(2)Addr:01H, Data:04H
(4)Addr:01H, Data:03H
(3)Addr:00H, Data:40H
MCKO output start
Addr:04H, Data:48H
Addr:05H, Data:00H
[AK4632]
2005/06
“H”

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