AK4632VN AKM [Asahi Kasei Microsystems], AK4632VN Datasheet - Page 25

• Manufacturer Part Number: AK4632VN
• Description: 16-Bit ?? Mono CODEC with ALC & MIC/SPK/Video-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
A reference clock of PLL is selected among the input clocks to MCKI, BICK or FCK pin. The required clock to the
AK4632 is generated by an internal PLL circuit. Input frequency is selected by PLL3-0 bits. When BICK input frequency
is 16fs, the audio interface format supports only Mode 0 (DSP Mode).
The external clocks (MCKI, BICK and FCK) should always be present whenever the ADC or DAC is in operation
(PMADC bit = “1” or PMDAC bit = “1”). If these clocks are not provided, the AK4632 may draw excess current and it is
not possible to operate properly because utilizes dynamic refreshed logic internally. If the external clocks are not present,
the ADC and DAC should be in the power-down mode (PMADC bit =PMDAC bit = “0”).
MS0396-E-00
a) PLL reference clock: BICK or FCK pin
b) PLL reference clock: MCKI pin
PLL Slave Mode (PMPLL bit = “1”, M/S bit = “0”)
In the case of using BICK as PLL reference clock, the sampling frequency corresponds to 7.35kHz to 48kHz by
changing FS3-0 bits. In the case of using FCK, the sampling frequency corresponds to 7.35kHz to 26kHz. (SeeTable
6)
BICK and FCK inputs should be synchronized with MCKO output. The phase between MCKO and FCK dose not
matter. Sampling frequency can be selected by FS3-0 bits. (See Table 5)
Figure 20. PLL Slave Mode 1 (PLL Reference Clock: FCK or BICK pin)
Figure 21. PLL Slave Mode 2 (PLL Reference Clock: MCKI pin)
AK4632
AK4632
MCKI
MCKO
BICK
FCK
SDTO
SDTI
MCKO
MCKI
BICK
FCK
SDTO
SDTI
16fs, 32fs, 64fs
16fs, 32fs, 64fs
256fs
1fs
- 25 -
1fs
11.2896MHz, 12MHz, 12.288MHz
13.5MHz, 24MHz, 27MHz
MCLK
BCLK
FCK
SDTI
SDTO
BCLK
FCK
SDTI
SDTO
DSP or µ P
DSP or µ P
[AK4632]
2005/06