ZL50018 ZARLINK [Zarlink Semiconductor Inc], ZL50018 Datasheet - Page 110

• Manufacturer Part Number: ZL50018
• Description: 2 K Digital Switch with Enhanced Stratum 3 DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

† Characteristics are over recommended operating conditions unless otherwise stated.
AC Electrical Characteristics
Note 1:
Note 2:
27 CS de-asserted time
28 RD setup to CS falling
29 WR setup to CS falling
30 Address setup to CS falling
31 RD hold after CS rising
32 WR hold after CS rising
33 Address hold after CS rising
34 Data setup to RDY high
35
36 Acknowledgement delay time.
37 Acknowledgement hold time.
38 RDY drive low to HiZ
CS
RD
WR
A0-A13
D0-D15
RDY
Data hold after CS rising
From CS low to RDY high:
From CS high to RDY low
Registers
Memory
High impedance is measured by pulling to the appropriate rail with R
discharge C
A delay of 500 µs to 2 ms (see Section 17.2 on page 48) must be applied before the first microprocessor access is
performed after the RESET pin is set high.
Characteristics
L
.
Figure 28 - Intel Non-Multiplexed Bus Timing - Read Access
†
- Intel Non-Multiplexed Bus Mode - Read Access
t
CSD
Sym.
t
t
t
t
Zarlink Semiconductor Inc.
t
t
t
CSD
t
t
t
t
AKD
AKH
t
AKZ
WS
WH
DH
RS
RH
AH
DS
AS
t
t
t
RS
AS
WS
ZL50018
Min.
110
15
10
10
5
0
0
0
8
7
4
Typ.
VALID ADDRESS
t
AKD
L
, with timing corrected to cancel time taken to
t
DS
Max.
175
185
VALID READ DATA
12
8
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
t
AH
AKH
t
DH
C
C
(Note 1)
C
C
C
(Note 1)
t
t
RH
WH
L
L
L
L
L
=50pF, R
Test Conditions
= 50 pF
= 50 pF
= 50 pF, R
= 50 pF
t
AKZ
Data Sheet
L
=1K
V
V
V
V
L
V
V
CT
CT
CT
CT
= 1 K
CT
CT
2