T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 24

• Manufacturer Part Number: T-8110L
• Manufacturer: AGERE [Agere Systems]

Ambassador T8110L H.100/H.110 Switch
4 Microprocessor Interface
4.3 Access Via the Microprocessor Bus
4.3.1 Microprocessor Interface Register Map
The T8110L registers map into the microprocessor bus space as follows.
Table 11. Microprocessor Interface Register Map
24
0x00100 5.1.1, 5.1.2
0x00104 5.1.3, 5.1.4
0x00108
0x0010C
0x00114
0x00118
0x00120
0x00124
0x00128
0x00140
0x00144
0x00148
0x00200
0x00204
0x00208
0x0020C
Address
DWORD
0x00210
0x00214
0x00220
0x00224
0x00228
0x00300
0x00320
0x00400
(20 bits)
Reference
5.2.2.2
Cross
6.1.11
5.1.4
5.1.4
4.1.5
5.2.1
5.2.2
11.1
11.1
11.1
6.1
6.1
6.1
6.1
6.1
6.1
6.2
6.2
6.2
9.1
9.2
7.1
Watchdog EN, upper
clock errors, upper
SCLK output rate
Phase alignment
Status 3, latched
Device ID, upper
Status 7, system
Fallback trigger,
H-bus rate H/G
L-bus rate H/G
Master enable
C8 output rate
L_SC3 select
DPLL1 rate
DPLL2 rate
APLL1 rate
APLL2 rate
Reserved
Reserved
Reserved
Reserved
FG0 rate
Byte 3
Diag11
select
upper
errors
Diag3
Diag7
(continued)
Fallback trigger, lower Fallback type select
Clock register access
APLL1 input selector
DPLL1 input selector
DPLL2 input selector
Watchdog EN, lower
Failsafe sensitivity
clock errors, lower
/FR_COMP width
(continued)
Status 2, latched
Device ID, lower
NETREF1 LREF
NETREF2 LREF
H-bus rate F/E
L-bus rate F/E
L_SC2 select
OOL monitor
TCLK select
FG0 width
Reserved
Reserved
Reserved
Diag10
Byte 2
select
Diag2
Diag6
select
select
Register
Data memory mode
OOL threshold high
clock errors, upper
Status 1, transient
NETREF1 divider
NETREF2 divider
Watchdog select,
Resource divider
NETREF output
FG0 upper start
Failsafe enable
H-bus rate D/C
L-bus rate D/C
L_SC1 select
Reset select
Main divider
Reserved
Reserved
Reserved
Reserved
Reserved
NETREF
enables
Byte 1
select
Diag1
Diag5
Diag9
Main inversion select
Watchdog select, C8
Main input selector
OOL threshold low
clock errors, lower
Status 0, transient
LREF input select
Agere Systems Inc.
Fallback control
NETREF1 input
NETREF2 input
Failsafe control
LREF inversion
FG0 lower start
February 2004
H-bus rate B/A
L-bus rate B/A
Master output
L_SC0 select
CCLK output
Version ID
Soft reset
Reserved
Status 4
selector
selector
enables
enables
Byte 0
Diag0
Diag4
Diag8
select