T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 45
T-8110L
Manufacturer Part Number
T-8110L
Description
Manufacturer
AGERE [Agere Systems]
Datasheet
1.T-8110L.pdf
(164 pages)
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February 2004
Agere Systems Inc.
6 Clock Architecture
6.1 Clock Input Control Registers
The following registers control the T8110L main clocking paths and NETREF paths.
Table 33. Clock Input Control Register Map
6.1.1 Main Input Selector Register
The main input selector register controls clock and frame input selection.
Table 34. Main Input Selector Register
* C2 is allowed as the bit clock input.
Choices include the following:
Oscillator/crystal clock = XTAL1_IN (16.384 MHz), no frame
NETREF1 clock = CT_NETREF1 (8 kHz, 1.544 MHz, or 2.048 MHz), no frame
NETREF2 clock = CT_NETREF2 (8 kHz, 1.544 MHz, or 2.048 MHz), no frame
LREF individual clock = one of LREF[0:7]*, no frame
LREF paired clock = one of LREF[0:3] (2.048 MHz), frame = one of LREF[4:7]*
H-bus A-clocks clock = CT_C8_A (8.192 MHz), frame = /CT_FRAME_A (8 kHz)
* Selection of which LREF is controlled at register 0x00208. Selection of LREF polarity is controlled at register 0x0020C.
Byte Address
DWORD Address
0x00200
(20 Bits)
0x0020C
0x00200
0x00204
0x00208
0x00210
0x00214
Main Input Selector
Name
DPLL1 rate
DPLL2 rate
APLL1 rate
APLL2 rate
Reserved
Reserved
Byte 3
(continued)
NETREF1 LREF select
NETREF2 LREF select
Bit(s)
APLL1 input selector
DPLL1 input selector
DPLL2 input selector
7:0
Reserved
Byte 2
Mnemonic
CKMSR
0000 0000
0001 0001
0001 0010
0010 0001
0010 0010
0100 0001
0100 0010
0100 0100
0100 1000
1000 0000
1000 0001
1000 0010
1000 0100
1000 1000
Ambassador T8110L H.100/H.110 Switch
Register
Value
NETREF1 divider
NETREF2 divider
Resource divider
Main divider
Reserved
Reserved
Byte 1
Select oscillator/crystal (default).
Select NETREF1.
Select NETREF2.
Select LREF[0:7] individually.
Select LREF[0:3, 4:7] paired.
Select H-bus A-clocks.
Select H-bus B-clocks.
Select MC1 R-clocks.
Select MC1 L-clocks.
Select MVIP clocks (C2 bit clock)*.
Select MVIP clocks (/C4 bit clock).
Select H-MVIP clocks (/C16± bit clock).
Select SC-bus clocks 2 MHz.
Select SC-bus clocks 4/8 MHz.
NETREF1 input selector
NETREF2 input selector
Function
LREF inversion select
Main inversion select
Main input selector
LREF input select
Byte 0
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