IDT72V90823PQFG IDT, Integrated Device Technology Inc, IDT72V90823PQFG Datasheet
IDT72V90823PQFG
Specifications of IDT72V90823PQFG
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IDT72V90823PQFG Summary of contents
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FEATURES: • 2,048 x 2,048 channel non-blocking switching at 8.192 Mb/s • Per-channel variable or constant throughput delay • ® Automatic identification of ST-BUS • Accept streams of 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s • Automatic frame offset delay ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 PIN CONFIGURATIONS INDEX RX0 RX1 RX2 RX3 RX4 RX5 RX6 RX7 RX8 RX9 RX10 RX11 RX12 RX13 RX14 RX15 F0i ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 PIN CONFIGURATIONS (CONTINUED) 76 DNC 77 DNC 78 RX0 RX1 79 RX2 80 RX3 81 RX4 82 RX5 83 RX6 84 RX7 85 RX8 86 RX9 87 RX10 88 RX11 ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 PIN DESCRIPTION SYMBOL NAME I/O GND Ground. Vcc Vcc TX0-15 (1) TX Output (Three-state Outputs) RX0-15 (1) RX Input F0i Frame Pulse ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 PIN DESCRIPTION (CONTINUED) SYMBOL NAME I/O IM (1) CPU Interface Mode I AD0-7 (1) Address/Data Bus I/O These pins are the eight least significant data bits of the microprocessor port. ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 FUNCTIONAL DESCRIPTION The IDT72V90823 is capable of switching up to 2,048 x 2,048, 64 Kbit/s PCM Kbit/s channel data. The device maintains frame integrity in data ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 SWITCHING CONFIGURATIONS The IDT72V90823 can operate at different speeds. To configure the maximum non-blocking switching data rate, the two DR bits in the IMS register are used. Following are the ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 CONSTANT DELAY MODE (V/C BIT = 1) In this mode, frame integrity is maintained in all switching configurations by making use of a multiple data memory buffer. Input channel data ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 Control Register The Control Register is only accessed when A7-A0 are all zeroed. When A7 = 128 bytes are randomly accessa- ble via A0-A6 at any one instant. ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 TABLE 2 — VARIABLE THROUGHPUT DELAY VALUE Input Rate 2.048 Mb/s 32 – (n-m) time-slots 4.096 Mb/s 64 – (n-m) time-slots 8.192 Mb/s 128 – (n-m) time-slots TABLE 3 — ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 TABLE 5 — OUTPUT HIGH IMPEDANCE CONTROL OE bit in Connection Memory TABLE 6 — CONTROL REGISTER (CR) BITS Read/Write Address Reset ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 TABLE 8 — INTERFACE MODE SELECTION (IMS) REGISTER BITS Read/Write Address Reset Value: 0000 . Bit ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 TABLE 10 — FRAME ALIGNMENT REGISTER (FAR) BITS Read/Write Address Reset Value: 0000 . CFE FD11 FD10 Bit ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 TABLE 11 — FRAME INPUT OFFSET REGISTER (FOR) BITS Read/Write Address: 03 for FOR0 register for FOR1 register for FOR2 register for FOR3 register, ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 TABLE 12 — OFFSET BITS (OFN2, OFN1, OFN0, DLEN) & FRAME DELAY BITS (FD11, FD2-0) Input Stream Offset No clock period shift (Default) + 0.5 clock period shift + 1.0 ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 TABLE 13 — CONNECTION MEMORY BITS V/C LPBK PC CCO OE Bit Name 15 LPBK (Per Channel Loopback) V/C 14 (Variable/Constant Throughput Delay ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 JTAG SUPPORT The IDT72V90823 JTAG interface conforms to the Boundary-Scan stan- dard IEEE-1149.1. This standard specifies a design-for-testability technique called Boundary-Scan Test (BST). The operation of the boundary-scan circuitry is ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 TABLE 15 — BOUNDARY SCAN REGISTER BITS Boundary Scan Bit 0 to bit 117 Device Pin Three-State Control Scan Cell TX7 0 TX6 2 TX5 4 TX4 6 TX3 8 ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Supply Voltage CC Vi Voltage on Digital Inputs (3.3V) GND -0.3 Vi Voltage on Digital Inputs (5.0V) GND -0.3 I Current at Digital Outputs ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 AC ELECTRICAL CHARACTERISTICS - FRAME PULSE AND CLK Symbol Characteristics ® t Frame Pulse Width (ST-BUS FPW t Frame Pulse Setup time before CLK falling (ST-BUS FPS t Frame Pulse ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 t FPW F0i t FPS CLK TX (1) Bit 0, Last Ch RX (1) Bit 0, Last Ch NOTE: 1. 2.048 Mb/s mode, last channel = ch 31, 4.096 Mb/s ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 t F0i HCLK 4.096 MHz CLK 16.384 MHz TX Bit 1, Ch 127 Bit 1, Ch 127 Bit 0, Ch 127 RX NOTE: 1. High Impedance is measured by pulling ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 AC ELECTRICAL CHARACTERISTICS - MULTIPLEXED BUS TIMING (INTEL) Symbol Parameter t ALE Pulse Width ALW t Address Setup from ALE falling ADS t Address Hold from ALE falling ADH RD ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 AC ELECTRICAL CHARACTERISTICS - MULTIPLEXED BUS TIMING (MOTOROLA) Symbol Parameter t ALE Pulse Width ASW t Address Setup from AS falling ADS t Address Hold from AS falling ADH Data ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 AC ELECTRICAL CHARACTERISTICS-MOTOROLA NON-MULTIPLEXED BUS MODE Symbol Parameter t CS Setup from DS falling CSS t R/W Setup from DS falling RWS t Address Setup from DS falling ADS t ...
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IDT72V90823 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 CLK GCI CLK ST-BUS t DSS DS t CSS CS t RWS R/W t ADS A0-A7 AD0-AD7/ D8-D15 DTA Figure 15. Motorola Non-Multiplexed Syncronous Bus Timing t DSS t ...
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ORDERING INFORMATION XXXXXX XX Device Type Package DATASHEET DOCUMENT HISTORY 5/19/2000 pgs. 1,3,18 and 25. 7/27/2000 pgs and 25. 8/14/2000 pg. 6. 9/14/2000 pgs 12, 13 and 18. 1/02/2001 pgs. 7, ...