EMC6D103-CK SMSC [SMSC Corporation], EMC6D103-CK Datasheet - Page 79

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EMC6D103-CK

Manufacturer Part Number
EMC6D103-CK
Description
FAN CONTROL DEVICE WITH HIGH FREQUENCY PWM
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
Datasheet
SMSC EMC6D103
8.2.32
8.2.33
8.2.34
8.2.35
Register
Address
Register
Address
Register
Address
Register
Address
8Ch
8Ah
8Bh
89h
Read/
Write
Read/
Read/
Read/
Write
Write
Write
R/W
R
are read the 4 LSb’s are latched into their respective bits in the A/D Converter LSbs Register. This
give 12-bits of resolution with a minimum value of 1/16
-127.9375 ºC < Temp < 127.9375 ºC and Voltage Range: 0 < Voltage < 256.9375) . See the DC
Characteristics for the accuracy of the reading values.
The eight most significant bits of the 12-bit averaged readings are stored in Reading registers and
compared with Limit registers. The Interrupt Status Register bits are asserted if the corresponding
measured value(s) on the inputs violate their programmed limits.
Register 89h: SMSC Test Register
Registers 8Ah: SMSC Test Register
Registers 8Bh: SMSC Test Register
This register becomes read only when the Lock bit is set. Any further attempts to write to this register
shall have no effect.
This register must not be written. Writing this register may produce unexpected results.
Registers 8Ch: SMSC Test Register
R
R
SMSC Test Register
SMSC Test Register
SMSC Test Register
SMSC Test Register
Register Name
Register Name
Register Name
Register Name
Table 8.52 Registers 8Ah: SMSC Test Register
Table 8.53 Registers 8Bh: SMSC Test Register
Table 8.54 Registers 8Ch: SMSC Test Register
Table 8.51 Register 89h: SMSC Test Register
(MSb)
(MSb)
(MSb)
TST7
Bit 7
Bit 7
Bit 7
RES
RES
DATASHEET
(MSb)
Bit 7
RES
TST6
TST6
TST6
Bit 6
Bit 6
Bit 6
79
Bit 6
RES
TST5
TST5
TST5
Bit 5
Bit 5
Bit 5
Bit 5
RES
th
per unit measured. (i.e., Temperature Range:
TST4
TST4
TST4
TST4
Bit 4
Bit 4
Bit 4
Bit 4
TST3
TST3
TST3
TST3
Bit 3
Bit 3
Bit 3
Bit 3
TST2
TST2
TST2
TST2
Bit 2
Bit 2
Bit 2
Bit 2
TST1
TST1
TST1
TST1
Bit 1
Bit 1
Bit 1
Bit 1
Revision 0.4 (04-04-05)
(LSb)
(LSb)
(LSb)
(LSb)
TST0
TST0
TST0
TST0
Bit 0
Bit 0
Bit 0
Bit 0
Default
Default
Default
Default
Value
Value
Value
Value
4Dh
4Dh
0Eh
N/A

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