HI-6010C HOLTIC [Holt Integrated Circuits], HI-6010C Datasheet
HI-6010C
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HI-6010C Summary of contents
Page 1
... Error flags are generated for transmitter underwrites and for receiver data framing miscues, parity errors, and buffer overwrites. The HI-6010 volt chip that will require data transla- tion from and to the ARINC bus. The HI-8482 and HI-8588 line receivers are available for the receiver side and the HI-318X, HI-838X and HI-858X line drivers are available for the transmitter side ...
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... HI-6010 DESCRIPTION 0.0 Volts Error indication if high. Status register must be read to determine specific error. Enables data transmission when low. Source clock for data transmission. 4 times bit rate. Hardware feature select. Master reset, active high. ...
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... This pin must have a clock applied that is 4X the desired receive frequency. PIN 13 - FCR In 8 bit mode, this pin flags the first character (byte) received bit mode, this pin goes high for a valid 32 bit word. The pin is not affected by CR3 programming. HI-6010 PIN 14 - RXD0 and PIN 16 - RXD1 These pins must be 5 volt logic levels ...
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... PIN 10 - TXD0 and PIN 11 - TXD1 TXD0 will go high during a transmission if the data is zero. TXD1 goes high if data is a one. When both pins are low this is referred to as the Null state. transmitter chip, such as the HI-8382, HI-8383, HI-8585 or HI-8586 is connected to these pins to translate the 5 volt levels to the proper ARINC bus levels ...
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... TXRDY & TXE Go Low After Load Data Monitor Pin High After Pin 9 High Then Load Next Byte Monitor Pin High Load ...
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... Write CR Monitor the Status Register & High - First Character Read 1st Byte RD3 RD2 RD1 Look for High Again 0 ...
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... P TD24 TD23 TD22 TD21 TD20 TD19 TD18 TD17 D31 TD30 TD29 TD28 TD27 TD26 TD25 HI-6010 Load Control Word & ...
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... 6L7 6L6 6L5 6L4 6L3 7L7 7L6 7L5 7L4 7L3 8L7 8L6 8L5 8L4 8L3 HI-6010 LOADING LABELS Control Bit 7 Must Be 0 First 0 ...
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... CDS DATA VALID BUS t CSSR CS Figure 1. TRANSMTTER OPERATION CTS t CTL t TXE CPW t ENDAT TXD0/ FIRST TXD1 BIT TXRDY Figure 3. HI-6010 DATA BUS TIMING - WRITE C/D t CDH DATA BUS t CSHR CS t DTX LAST t BIT TXRY HOLT INTEGRATED CIRCUITS 4-11 VALID CDH ...
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... CSHW CTL t ENDAT t TXRDY t TDTX t CPW t DR HOLT INTEGRATED CIRCUITS 4-12 P 500mW D T (Industrial) -40°C to +85° (Hi temp & Military) -55°C to +125° -65°C to +150°C STG T 300°C for 60 Seconds LEAD MIN TYP MAX UNITS 4.5 5 5.5 V 2.1 1.4 V 1.4 0.7 V -1.5 µA 1.5 µ ...
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... ORDERING INFORMATION PART PACKAGE NUMBER DESCRIPTION HI-6010C 28 PIN CERAMIC SIDE BRAZED DIP HI-6010CT 28 PIN CERAMIC SIDE BRAZED DIP HI-6010CM-01 28 PIN CERAMIC SIDE BRAZED DIP HI-6010J 28 PIN PLASTIC J -LEAD PLCC HI-6010JT 28 PIN PLASTIC J -LEAD PLCC HI-6010 TEMPERATURE RANGE -40°C TO +85°C -55°C TO +125°C -55° ...
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... PLASTIC PLCC PIN NO. 1 .045 x 45° .490 .005 (12.446 .127) SQ. .173 .008 (4.394 .203) (10.414 HI-6010 PACKAGE DIMENSIONS 1.400 .014 (35.560 .356) .595 .010 (15.113 .254) .085 .009 (2.159 .229) 010 .002 .001 (.254 .051 .025) ...