HM17CM256 HYNIX [Hynix Semiconductor], HM17CM256 Datasheet - Page 70

• Manufacturer Part Number: HM17CM256
• Description: 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
• Manufacturer: HYNIX [Hynix Semiconductor]

HM17CM256
- 70 -
(34-19) RAM data length setting
(34-20) Electric volume registers setting.
( reset :{WLS}=0
CKS: Selection the oscillator.
( read address :A
( read address :B
( reset :DV
Setting the electric volume code.
CS
WLS: Selection 8 bit access or 16 bit access at RAM access. Access with 16 bits data length is effective
CS
CS
0
0
0
to upper side of electric volume, voltage level is not changed immediately.
CKS=”0”: internal oscillation mode ( default ).
CKS=”1”: external oscillation mode.
The output voltage of V
N=1 under the condition of boosting operation is not valid (booster coefficient register, VU=0
The LCD driving voltage V
To prevent over voltage from being generated by electric volume setting, when the register value is set
When the register value is set to lower side of electric volume, the voltage level is changed instantly.
only at RAM access. The other accesses are 8 bits access ( command access ).
connection between OSC
RS
RS
RS
1
1
1
Internal oscillation mode should be used under condition of OSC
External oscillation mode should be used under the condition of clock input by OSC
6
~DV
WLS=”0”: RAM access is done by 8 bits data length.
WLS=”1”: RAM access is done by 16 bits data length
V
V
RD
RD
RD
1
1
1
REG
LCD
DV
0
H
=00
0
0
1
1
H
H
, read address :9
)
) * : “Don’t care”
6
= 0.5 x V
= V
H
WR
WR
WR
)
0
0
0
REF
DV
(N: booster coefficient)
( M : DV
0
0
1
1
5
x N
RE
RE
RE
REG
REG
1
1
1
DV
2
2
2
LCD
0
0
1
1
+ M x (V
is determined by Eq.
6
~DV
4
1
and OSC
RE
RE
RE
is decided by V
0
0
0
The voltage range is divided into 127 levels by this register
H
DV
0
) * : “Don’t care”
1
1
1
0
0
1
1
:
:
register value )
3
REG
RE
RE
RE
0
0
0
- 0.5V
2
DV
0
0
0
port.
0
0
1
1
2
REG
REG
DV
0
0
1
1
) / 127
D
D
D
level or electric volume value (Eq.
1
1
1
1
7
7
7
.
DV
0
1
0
1
D
D
D
0
0
0
0
6
6
6
D
D
D
0
1
1
5
5
5
Output voltage
D
1
D
D
1
0
1
high
and OSC
4
4
4
low
:
:
:
:
DV
D
D
D
*
*
3
3
3
3
2
open.
DV
DV
D
D
D
*
2
2
2
2
6
).
1
CKS
DV
DV
port or resistor
D
D
D
1
1
1
H
1
5
).
WLS
DV
DV
D
D
D
0
0
0
0
4