YMF754-V ETC, YMF754-V Datasheet - Page 26

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YMF754-V

Manufacturer Part Number
YMF754-V
Description
DS-1E
Manufacturer
ETC
Datasheet
YMF754
b11..............PSIO: Power Save I/O Pad
b12..............PSHWV: Power Save Hardware Volume
Setting this bit to “1” cuts the pull up resistor of the input pins except for the PCI interface and AC-Link.
The input signals keep the level before PSIO bit is set from “0” to “1”. In case the input level is only
“low”, the pull up resistor is cut.
Setting this bit to “1” stops a clock supplied to the Hardware Volume block.
“0”: Normal
“1”: Cuts the pull up resistor
“0”: Normal
“1”: Disable
External Input
(24.576MHz)
(33MHz)
Master
Clock
Clock
DMC
PCI
(default)
(default)
DPLL
Power Management Block
PLL
-26-
PSHWV
PSMPU
PSSRC
PSPCA
PSJOY
PSACL
PSDIR
CMCD
PSDIT
PSFM
PSSB
PSZV
PSIO
AC97 Master Clock
FM Synthesizer
EEPROM I/F
SPDIF OUT
PCI Audio
MPU401
SPDIF IN
H/W Vol.
Joystick
AC-link
PC/PCI
D-DMA
I/O Pad
SB Pro
ZVport
PCI I/F
S-IRQ
SRC
June 28, 1999

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