YMF754-V ETC, YMF754-V Datasheet - Page 54

• Manufacturer Part Number: YMF754-V
• Description: DS-1E
• Manufacturer: ETC

YMF754
4-3. PCI Interface
Note : Top = 0-70°C, PVDD=3.3±0.3 V, VDD=3.3±0.3 V, CVDD=2.5±0.2 V, LVDD=2.5±0.2 V, C
PCICLK Cycle Time
PCICLK High Time
PCICLK Low Time
PCICLK Slew Rate
PCICLK to Signal Valid Delay
Float to Active Delay
Active to Float Delay
Input Setup Time to PCICLK
Input Hold Time for PCICLK
*11: This characteristic is applicable to REQ# and PCREQ# signal.
*12: This characteristic is applicable to GNT# and PCGNT# signal.
OUTPUT
Tri-State
OUTPUT
PCICLK
Item
(Fig.3, 4)
PCICLK
t
t
PON
PVAL
t
Symbol
t
PVAL(PTP)
Fig.4: PCI Bus Signals timing
PSU(PTP)
t
t
t
t
t
PHIGH
t
PLOW
t
PCYC
PVAL
POFF
t
t
PON
PSU
PH
Fig.3: PCI Clock timing
POFF
-
INPUT
t
PHIGH
(Bused signal)
(Point to Point)
(Bused signal)
*11 (Point to Point)
*12 (Point to Point)
-54-
Condition
t
PCYC
0.5 V
DD3
t
PLOW
1.5 V
t
PSU
Min.
0.3 V
30
11
11
10
12
0.4 V
1
2
2
2
7
0
-
DD3
DD3
1.5 V
t
PH
Typ.
-
-
-
-
-
-
-
-
-
-
-
-
L
=10 pF
June 28, 1999
1.5 V
Max.
11
12
28
4
-
-
-
-
-
-
-
-
V/ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns