CN8330EPD CONEXANT [Conexant Systems, Inc], CN8330EPD Datasheet - Page 68

• Manufacturer Part Number: CN8330EPD
• Description: DS3/E3 Framer with 52 Mbps HDLC Controller
• Manufacturer: CONEXANT [Conexant Systems, Inc]

3.0 Registers
3.2 Status Registers
The Shadow Status Register contains copies of the five least significant bits of the DS3/E3 Maintenance Status
Register [SR00;0x10]. Whenever a status indication appears in the DS3/E3 Maintenance Status Register, the
corresponding bit is also set in the Shadow Status Register. The bits in this Shadow Status Register are latched
and held until the controller reads the register. This register provides a way to monitor transient occurrences of
alarm indications without continuously polling the DS3/E3 Maintenance Status Register. An additional bit not
contained in the DS3/E3 Maintenance Status Register is All-Ones Detect. If the shadow interrupt is enabled, any
occurrence of an indication in bits 0 through 4 will cause an active low interrupt to occur on the
CNTINT/LINELB pin.
ShdwAll1
ShdwIdle
ShdwYel
ShdwAIS
ShdwOOF
ShdwLOS
3-10
0x16—Shadow Status Register (SR06)
Rsvd
7
NOTE(S):
Shadow All-Ones Detect—Set whenever an unframed all-ones signal has been detected in
either DS3 or E3 mode.
Shadow Idle Code Detect—Set if there is valid framing and parity, the three C-bits in subframe
3 are zero, both X-bits are equal, and the payload contains a 1100... pattern starting with a 11
after each overhead bit in DS3 mode. This bit will be low in E3 mode since there is no defined
E3 idle signal.
Shadow Yellow Alarm Detect—Set for one M-frame interval when both X-bits are low in the
previous M-frame in DS3 mode. This bit is set when the received A-bit is high in E3 mode.
Shadow Alarm Indication Signal Detect—Set if there is valid framing and parity, all C-bits are
0, both X-bits are equal, and the payload contains a 1010... pattern starting with a one after
each overhead bit in DS3 mode. This bit is set when an unframed all-ones signal is received in
E3 mode.
Shadow Out of Frame—Set when any 3 out of 16 consecutive F framing bits are in error or
when 2 out of 3 consecutive M-frames have errors in the M-bit positions in DS3 mode. This bit
is set when four consecutive FAS errors have been received in E3 mode. This condition will
initiate a reframe.
Shadow Loss-of-Signal Alarm—Indicates that the received signal prior to B3ZS/HDB3
decoding has been low for 175 ± 75 clock cycles. This indicates that the CN8330 line signal
has been lost. This signal is set as soon as the loss-of-signal condition is detected and is cleared
when at least 33percent (25 percent in E3 mode) one's density is achieved for 175 ± 75 clock
cycles.
Rsvd
6
Rsvd bits in Control Registers must be set to zero.
ShdwAll1
5
ShdwIdle
4
Conexant
ShdwYel
3
DS3/E3 Framer with 52 Mbps HDLC Controller
ShdwAIS
2
ShdwOOF
1
ShdwLOS
CN8330
100441E
0