HY5PS1G421LM HYNIX [Hynix Semiconductor], HY5PS1G421LM Datasheet - Page 16

• Manufacturer Part Number: HY5PS1G421LM
• Description: 1Gb DDR2 SDRAM(DDP)
• Manufacturer: HYNIX [Hynix Semiconductor]

Rev. 0.2 / Oct. 2005
*1 : BA2 and A13~A15 are reserved for future use and must be programmed to 0 when setting the mode register.
EMRS(1) Programming
BA
0*
1
2
BA
0
1
RDQS, RDQS. This feature is used in
conjunction with DIMM IDD meaurements when
IDDQ is not desired to
A
BA
0
1
DM function is disabled. RDQS
is active for reads and don’t
care for writes.
12
1
a.
A10
A11
BA1
0
a: When Adjust mode is issued, AL from previously set value must be applied.
b: After setting to default, OCD mode needs to be exited by setting A9-A7 to
000. Refer to the following 2.2.2.3 section for detailed information
0
1
0
1
0
0
1
1
* If RDQS is enabled, the
Outputs disabled - DQs, DQSs, DQSs,
A
0
0
0
1
1
A9
15 ~
0*
Qoff (Optional)
1
A
BA0
0
1
0
1
13
Output buffer disabled
RDQS Enable
Output buffer enabled
0
0
1
0
1
A8
Disable
Disable
Enable
Qoff
Enable
A
EMRS(2): Reserved
EMRS(3): Reserved
12
DQS
0
1
0
0
1
A7
RDQS
be included.
A
11
MRS mode
EMRS(1)
OCD Calibration mode exit; maintain setting
Drive(1)
Drive(0)
Adjust mode
OCD Calibration default
MRS
a
DQS
A
10
A
OCD Calibration Program
OCD program
9
(RDQS Enable)
a
0 (Disable)
0 (Disable)
1 (Enable)
1 (Enable)
A
8
A11
A
7
A6
0
0
1
1
b
Rtt
A
6
(DQS Disable)
0
1
0
1
A2
1 (Disable)
1 (Disable)
0 (Enable)
0 (Enable)
ODT Disabled
A
A10
5
Additive latency
R
Reserved
150 ohm
tt
75 ohm
(
NOMINAL
A
4
A
)
RDQS/DM
3
0
1
A1
RDQS
RDQS
DM
DM
A
Rtt
2
0
0
0
0
1
1
1
1
A
Impedence Control
1HY5PS12421(L)M
Strobe Function Matrix
5
D.I.C
HY5PS12821(L)M
A
Output Driver
1
0
0
1
1
0
0
1
1
A
RDQS
Normal
RDQS
4
Hi-z
Hi-z
Hi-z
DLL
Half
A
A
0
1
0
0
1
0
1
0
1
0
1
0
A
3
Address Field
Extended Mode Register
DLL Enable
Additive Latency
DQS
DQS
DQS
DQS
DQS
Disable
Reserved
Reserved
Enable
0
1
2
3
4
5
16
DQS
DQS
DQS
Hi-z
Hi-z
100%
Driver
60%
Size