GS88237BB-200IV GSI Technology, GS88237BB-200IV Datasheet - Page 4

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GS88237BB-200IV

Manufacturer Part Number
GS88237BB-200IV
Description
256k X 36 9mb Scd/dcd Sync Burst Sram
Manufacturer
GSI Technology
Datasheet
GS88237BB/D-xxxV BGA Pin Description
Rev: 1.04 6/2006
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
B
ADSC, ADSP
A
Symbol
, B
A
V
ADV
TMS
TDO
MCL
SCD
DQ
DQ
DQ
DQ
LBO
TCK
V
BW
GW
TDI
V
B
0
NC
NC
CK
PE
ZQ
ZZ
E
E
E
FT
DDQ
G
A
, B
, A
DD
SS
1
3
2
A
B
C
D
1
C
, B
D
Type
I/O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
FLXDrive Output Impedance Control (Low = Low Impedance [High Drive], High = High Impedance [Low
Byte Write Enable for DQ
Address Strobe (Processor, Cache Controller); active low
4/28
Single Cycle Deselect/Dual Cyle Deselect Mode Control
Address field LSBs and Address Counter Preset Inputs
Burst address counter advance enable; active l0w
Global Write Enable—Writes all bytes; active low
Byte Write—Writes all enabled bytes; active low
9th Bit Enable; active low (119-bump BGA only)
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
Sleep mode control; active high
Clock Input Signal; active high
Data Input and Output pins
Output driver power supply
Output Enable; active low
Chip Enable; active high
Chip Enable; active low
Chip Enable; active low
Scan Test Mode Select
I/O and Core Ground
Scan Test Data Out
Core power supply
Must Connect Low
Scan Test Data In
Scan Test Clock
Address Inputs
Description
No Connect
No Connect
A
, DQ
Drive])
B
, DQ
C
, DQ
D
I/Os; active low
GS88237BB/D-xxxV
© 2003, GSI Technology

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