MC9S12P32MFT Freescale Semiconductor, MC9S12P32MFT Datasheet - Page 220
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MC9S12P32MFT
Manufacturer Part Number
MC9S12P32MFT
Description
16-bit Microcontrollers - MCU 16 BIT 32K FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S12P64VQK.pdf
(566 pages)
Specifications of MC9S12P32MFT
Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
32 MHz
Program Memory Size
32 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
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S12 Clock, Reset and Power Management Unit (S12CPMU)
7.3.2.12
This register is used to restart the COP time-out period.
Read: Always reads $00
Write: Anytime
When the COP is disabled (CR[2:0] = “000”) writing to this register has no effect.
When the COP is enabled by setting CR[2:0] nonzero, the following applies:
7.3.2.13
The CPMUHTCTL register configures the temperature sense features.
Read: Anytime
Write: VSEL, HTE, HTIE and HTIF are write anytime, HTDS is read only
220
0x02F0
0x003F
Reset
Reset
W
W
R
R
Writing any value other than $55 or $AA causes a COP reset. To restart the COP time-out period
write $55 followed by a write of $AA. These writes do not need to occur back-to-back, but the
sequence ($55, $AA) must be completed prior to COP end of time-out period to avoid a COP reset.
Sequences of $55 writes are allowed. When the WCOP bit is set, $55 and $AA writes must be done
in the last 25% of the selected time-out period; writing any value in the first 75% of the selected
period will cause a COP reset.
Bit 7
S12CPMU COP Timer Arm/Reset Register (CPMUARMCOP)
H
0
0
0
0
7
7
igh
T
= Unimplemented or Reserved
emperature
Bit 6
0
0
0
0
6
6
Figure 7-15. S12CPMU CPMUARMCOP Register
S12P-Family Reference Manual, Rev. 1.13
VSEL
Bit 5
0
0
0
5
5
Control Register (CPMUHTCTL)
Bit 4
0
0
0
0
4
4
Bit 3
HTE
0
0
0
3
3
HTDS
Bit 2
0
0
0
2
2
Freescale Semiconductor
HTIE
Bit 1
0
0
0
1
1
HTIF
Bit 0
0
0
0
0
0
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