MC9S12P32MFT Freescale Semiconductor, MC9S12P32MFT Datasheet - Page 43

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MC9S12P32MFT

Manufacturer Part Number
MC9S12P32MFT
Description
16-bit Microcontrollers - MCU 16 BIT 32K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12P32MFT

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
32 MHz
Program Memory Size
32 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
1.9.1
The different modes and the security state of the MCU affect the debug features (enabled or disabled).
The operating mode out of reset is determined by the state of the MODC signal during reset (see
10). The MODC bit in the MODE register shows the current operating mode and provides limited mode
switching during operation. The state of the MODC signal is latched into this bit on the rising edge of
RESET.
1.9.1.1
This mode is intended for normal device operation. The opcode from the on-chip memory is being
executed after reset (requires the reset vector to be programmed correctly). The processor program is
executed from internal memory.
1.9.1.2
This mode is used for debugging single-chip operation, boot-strapping, or security related operations. The
background debug module BDM is active in this mode. The CPU executes a monitor program located in
an on-chip ROM. BDM firmware waits for additional serial commands through the BKGD pin.
Freescale Semiconductor
Chip Configuration Summary
Normal Single-Chip Mode
Special Single-Chip Mode
S12P-Family Reference Manual, Rev. 1.13
Normal single chip
Special single chip
Table 1-10. Chip Modes
Chip Modes
MODC
1
0
Device Overview MC9S12P-Family
Table 1-
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