S9S12G64F0MLH Freescale Semiconductor, S9S12G64F0MLH Datasheet - Page 412
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S9S12G64F0MLH
Manufacturer Part Number
S9S12G64F0MLH
Description
16-bit Microcontrollers - MCU S12 Core,64k Flash
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0MLH
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
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S12 Clock, Reset and Power Management Unit (S12CPMU)
Windowed COP operation is enabled by setting WCOP in the CPMUCOP register. In this mode, writes to
the CPMUARMCOP register to clear the COP timer must occur in the last 25% of the selected time-out
period. A premature write will immediately reset the part.
10.5.3
The on-chip POR circuitry detects when the internal supply VDD drops below an appropriate voltage
level. The POR is deasserted, if the internal supply VDD exceeds an appropriate voltage level (voltage
levels are not specified in this document because this internal supply is not visible on device pins).
10.5.4
The on-chip LVR circuitry detects when one of the supply voltages VDD, VDDF or VDDX drops below
an appropriate voltage level. If LVR is deasserted the MCU is fully operational at the specified maximum
speed. The LVR assert and deassert levels for the supply voltage VDDX are V
specified in the device Reference Manual.
10.6
The interrupt/reset vectors requested by the S12CPMU are listed in
specification for related vector addresses and priorities.
10.6.1
10.6.1.1
The clock source for the RTI is either IRCCLK or OSCCLK depending on the setting of the RTIOSCSEL
bit. In Stop Mode with PSTP=1 (Pseudo Stop Mode), RTIOSCSEL=1 and PRE=1 the RTI continues to
run, else the RTI counter halts in Stop Mode.
414
Interrupts
Power-On Reset (POR)
Low-Voltage Reset (LVR)
Description of Interrupt Operation
Real Time Interrupt (RTI)
RTI time-out interrupt
Low voltage interrupt
Interrupt Source
Periodical Interrupt
PLL lock interrupt
Oscillator status
Autonomous
interrupt
Table 10-29. S12CPMU Interrupt Vectors
MC9S12G Family Reference Manual,
Mask
CCR
I bit
I bit
I bit
I bit
I bit
CPMUAPICTL (APIE)
CPMUINT (LOCKIE)
CPMULVCTL (LVIE)
CPMUINT (OSCIE)
CPMUINT (RTIE)
Local Enable
Rev.1.23
Table
10-29. Refer to MCU
LVRXA
Freescale Semiconductor
and V
LVRXD
and are
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