S9S12G64F0MLH Freescale Semiconductor, S9S12G64F0MLH Datasheet - Page 642
S9S12G64F0MLH
Manufacturer Part Number
S9S12G64F0MLH
Description
16-bit Microcontrollers - MCU S12 Core,64k Flash
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0MLH
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
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Pulse-Width Modulator (S12PWM8B8CV2)
Read: Anytime
Write: Anytime
Note: Bits related to available channels have functional significance. Writing to unavailable bits has no effect. Read from
19.3.2.3
Each PWM channel has a choice of four clocks to use as the clock source for that channel as described
below.
Read: Anytime
Write: Anytime
644
Module Base + 0x0001
Module Base + 0x0002
PPOL[7:0]
Reset
Reset
Field
7–0
unavailable bits return a zero
W
W
R
R
PPOL7
PCLK7
Pulse Width Channel 7–0 Polarity Bits
0 PWM channel 7–0 outputs are low at the beginning of the period, then go high when the duty count is
1 PWM channel 7–0 outputs are high at the beginning of the period, then go low when the duty count is
PWM Clock Select Register (PWMCLK)
0
0
7
7
PPOLx register bits can be written anytime. If the polarity is changed while
a PWM signal is being generated, a truncated or stretched pulse can occur
during the transition
Register bits PCLK0 to PCLK7 can be written anytime. If a clock select is
changed while a PWM signal is being generated, a truncated or stretched
pulse can occur during the transition.
reached.
reached.
PCLKL6
PPOL6
0
0
6
6
Figure 19-5. PWM Clock Select Register (PWMCLK)
Figure 19-4. PWM Polarity Register (PWMPOL)
Table 19-3. PWMPOL Field Descriptions
MC9S12G Family Reference Manual,
PPOL5
PCLK5
0
0
5
5
PPOL4
PCLK4
NOTE
NOTE
0
0
4
4
Description
PPOL3
PCLK3
0
0
3
3
Rev.1.23
PPOL2
PCLK2
0
0
2
2
PPOL1
PCLK1
Freescale Semiconductor
0
0
1
1
PPOL0
PCLK0
0
0
0
0
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