S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 248

• Manufacturer Part Number: S912XEP768J5MAGR
• Description: 16-bit Microcontrollers - MCU 16-bit 768K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S912XEP768J5MAGR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 768 KB
• Data Ram Size: 48 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.3 V to 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT

Chapter 5 External Bus Interface (S12XEBIV4)
5.4
This section describes the functions of the external bus interface. The availability of external signals and
functions in relation to the operating mode is initially summarized and described in more detail in separate
sub-sections.
5.4.1
A summary of the external bus interface functions for each operating mode is shown in
248
EXSTR1[2:0]
EXSTR0[2:0]
unimplemented area
visible externally
address access
Internal access
Field
PRR access
6–4
2–0
(if Enabled)
Properties
access
External
and
Functional Description
Operating Modes and External Bus Properties
(2)
External Access Stretch Option 1 Bits 2, 1, 0 — This three bit field determines the amount of additional clock
stretch cycles on every access to the external address space as shown in
External Access Stretch Option 0 Bits 2, 1, 0 — This three bit field determines the amount of additional clock
stretch cycles on every access to the external address space as shown in
(1)
write internal
Single-Chip
read internal
2 cycles
Normal
Single-Chip Modes
—
—
Table 5-8. External Access Stretch Bit Definition
MC9S12XE-Family Reference Manual Rev. 1.25
Table 5-7. EBICTL1 Field Descriptions
EXSTRx[2:0]
Table 5-9. Summary of Functions
write internal
Single-Chip
read internal
2 cycles
Special
000
001
010
011
100
101
110
111
—
—
Timing Properties
Max. of 2 to 9
or n cycles of
write internal
programmed
Number of Stretch Cycles
read internal
Expanded
ext. wait
2 cycles
Normal
cycles
Description
—
(3)
1
2
3
4
5
6
7
8
write int & ext
read external
Single-Chip
Emulation
2 cycles
1 cycle
1 cycle
Expanded Modes
Table
Table
write int & ext
Max. of 2 to 9
read external
or n cycles of
programmed
Emulation
Expanded
5-8.
5-8.
ext. wait
2 cycles
1 cycle
cycles
Freescale Semiconductor
3
Table
write internal
read internal
5-9.
Special
2 cycles
1 cycle
1 cycle
Test