S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 431
S912XEP768J5MAGR
Manufacturer Part Number
S912XEP768J5MAGR
Description
16-bit Microcontrollers - MCU 16-bit 768K Flash
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEG128J2MAL.pdf
(1324 pages)
Specifications of S912XEP768J5MAGR
Rohs
yes
Core
HCS12X
Processor Series
MC9S12
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
768 KB
Data Ram Size
48 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V to 5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S912XEP768J5MAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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LDB
Operation
M[RB, #OFFS5]
M[RB, RI]
M[RB, RI]
RI-1
Loads a byte from memory into the low byte of register RD. The high byte is cleared.
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
LDB RD, (RB, #OFFS5)
LDB RD, (RS, RI)
LDB RD, (RS, RI+)
LDB RD, (RS, -RI)
—
N
1. If the same general purpose register is used as index (RI) and destination register (RD), the content of the register will not
be incremented after the data move: M[RB, RI] ⇒ RD.L; $00 ⇒ RD.H
Not affected.
Not affected.
Not affected.
Not affected.
—
Z
—
V
Source Form
—
C
⇒ RD.L;
⇒ RD.L;
⇒ RD.L;
⇒ RI;
MC9S12XE-Family Reference Manual Rev. 1.25
$00
$00
$00
M[RS, RI] ⇒ RD.L;
Address
Mode
IDO5
IDR+
-IDR
IDR
Load Byte from Memory
⇒ RD.H
⇒ RD.H
⇒ RD.H;
0
0
0
0
(Low Byte)
1
1
1
1
0
1
1
1
0
0
0
0
RI+1 ⇒ RI;
$00 ⇒ RD.H
0
0
0
0
Machine Code
RD
RD
RD
RD
1
RB
RB
RB
RB
Chapter 10 XGATE (S12XGATEV3)
RI
RI
RI
OFFS5
LDB
0
0
1
0
1
0
Cycles
Pr
Pr
Pr
Pr
431
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