S29GL512S10FHI010 Spansion, S29GL512S10FHI010 Datasheet - Page 86

• Manufacturer Part Number: S29GL512S10FHI010
• Description: Flash 512Mb 3V 100ns Parallel NOR Flash
• Manufacturer: Spansion

Specifications of S29GL512S10FHI010

• Rohs: yes
• Data Bus Width: 16 bit
• Memory Type: Flash
• Memory Size: 512 Mbit
• Architecture: 32 M x 16
• Timing Type: Asynchronous
• Interface Type: Parallel
• Access Time: 100 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 25 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-64

20. Advance Information on S29GL-R 65 nm MirrorBit Hardware
86
Reset (RESET#) and Power-up Sequence
Note
CE#, OE# and WE# must be at logic high during Reset Time.
Note
The sum of t
Notes
1. V
2. V
3. Maximum V
Note
The sum of t
Parameter
Parameter
does not permit any read and write operations, valid read operations return FFh, and a hardware reset is required.
RESET#
t
t
t
t
IO
IO
VIOS
RPH
t
t
VCS
RPH
t
t
RP
RH
RP
RH
< V
and V
CE#
V
V
CC
CC
IO
RP
RP
CC
+ 200 mV.
RESET# Low to CE# Low
RESET# Pulse Width
Time between RESET# (high) and CE# (low)
V
V
RESET# Low to CE# Low
RESET# Pulse Width
Time between RESET# (high) and CE# (low)
CC
and t
and t
CC
IO
ramp must be in sync during power-up. If RESET# is not stable for 300 µs, the following conditions may occur: the device
power up current is 20 mA (RESET# =V
Setup Time to first access
Setup Time to first access
RH
RH
RESET#
must be equal to or greater than t
must be equal to or greater than t
CE#
Table 20.2 Power-Up Sequence Timings
Table 20.1 Hardware Reset (RESET#)
Figure 20.2 Power-On Reset Timings
Figure 20.1 Reset Timings
Description
Description
S29GL-N
t
RP
RPH
RPH
D a t a
IL
).
.
.
t
t
VIOS
VCS
t
RPH
S h e e t
t
t
RH
RP
t
RPH
t
S29GL-N_00_B8 May 30, 2008
RH
Limit
Limit
Min
Min
Min
Min
Min
Min
Min
Min
Time
Time
200
200
300
300
200
200
35
35
Unit
Unit
µs
ns
ns
µs
µs
µs
ns
ns