SC16IS762IBS-F NXP Semiconductors, SC16IS762IBS-F Datasheet - Page 30

• Manufacturer Part Number: SC16IS762IBS-F
• Description: UART Interface IC I2C/SPI-UARTBRIDGE W/IRDA AND GPIO
• Manufacturer: NXP Semiconductors
• Type: RS-232 or RS-485 or IrDAr

Specifications of SC16IS762IBS-F

• Product Category: UART Interface IC
• Rohs: yes
• Number Of Channels: 2
• Data Rate: 5 Mbps
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.3 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 95 C
• Minimum Operating Temperature: - 40 C
• Package / Case: HVQFN-32
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V, 3.3 V
• Factory Pack Quantity: 1500
• Part # Aliases: SC16IS762IBS,128

NXP Semiconductors
SC16IS752_SC16IS762
Product data sheet
8.13 Transmitter FIFO Level register (TXLVL)
8.14 Receiver FIFO Level register (RXLVL)
8.15 Programmable I/O pins Direction register (IODir)
8.16 Programmable I/O pins State register (IOState)
This register is a read-only register. It reports the number of spaces available in the
transmit FIFO.
Table 24.
This register is a read-only register, it reports the fill level of the receive FIFO, that is, the
number of characters in the RX FIFO.
Table 25.
This register is used to program the I/O pins direction. Bit 0 to bit 7 controls GPIO0 to
GPIO7.
Table 26.
When ‘read’, this register returns the actual state of all I/O pins. When ‘write’, each
register bit will be transferred to the corresponding I/O pin programmed as output.
Table 27.
Bit
7
6:0
Bit
7
6:0
Bit
7:0
Bit
7:0
Symbol
-
TXLVL[6:0]
Symbol
-
RXLVL[6:0]
Symbol
IODir
Symbol
IOState
Transmitter FIFO Level register bits description
Receiver FIFO Level register bits description
IODir register bits description
IOState register bits description
All information provided in this document is subject to legal disclaimers.
Dual UART with I
Rev. 9 — 22 March 2012
number of spaces available in TX FIFO, from 0 (0x00) to 64 (0x40)
Description
not used; set to zeros
Description
not used; set to zeros
number of characters stored in RX FIFO, from 0 (0x00) to 64 (0x40)
Description
Set GPIO pins [7:0] to input or output.
Description
Write this register: set the logic level on the output pins
Read this register: return states of all pins
0 = input
1 = output
0 = set output pin to zero
1 = set output pin to one
SC16IS752; SC16IS762
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
© NXP B.V. 2012. All rights reserved.
30 of 60