C8051F707-GMR Silicon Labs, C8051F707-GMR Datasheet - Page 126

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C8051F707-GMR

Manufacturer Part Number
C8051F707-GMR
Description
8-bit Microcontrollers - MCU 16kB Cap Sense
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F707-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
C8051F70x/71x
126
Note: T
Parameter
T
T
T
T
T
T
T
T
T
ALEH
ALEL
ACW
WDS
WDH
ACS
ACH
RDS
RDH
SYSCLK
is equal to one period of the device system clock (SYSCLK).
Address/Control Setup Time
Address/Control Pulse Width
Address/Control Hold Time
Address Latch Enable High Time
Address Latch Enable Low Time
Write Data Setup Time
Write Data Hold Time
Read Data Setup Time
Read Data Hold Time
Table 18.1. AC Parameters for External Memory Interface
Description
Rev. 1.0
T
T
T
T
SYSCLK
SYSCLK
SYSCLK
SYSCLK
Min*
20
0
0
0
0
16 x T
19 x T
3 x T
3 x T
4 x T
4 x T
3 x T
Max*
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns

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