C8051F707-GMR Silicon Labs, C8051F707-GMR Datasheet - Page 172

• Manufacturer Part Number: C8051F707-GMR
• Description: 8-bit Microcontrollers - MCU 16kB Cap Sense
• Manufacturer: Silicon Labs

Specifications of C8051F707-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F70x/71x
SFR Definition 27.1. CLKSEL: Clock Select
SFR Address = 0xBD; SFR Page= F
172
Name
Reset
6:4
2:0 CLKSEL[2:0] System Clock Select.
Bit
Type
7
3
Bit
Reserved
CLKRDY
CLKDIV
CLKRDY
Name
R
7
0
System Clock Divider Clock Ready Flag.
0: The selected clock divide setting has not been applied to the system clock.
1: The selected clock divide setting has been applied to the system clock.
System Clock Divider Bits.
Selects the clock division to be applied to the selected source (internal or external).
000: Selected clock is divided by 1.
001: Selected clock is divided by 2.
010: Selected clock is divided by 4.
011: Selected clock is divided by 8.
100: Selected clock is divided by 16.
101: Selected clock is divided by 32.
110: Selected clock is divided by 64.
111: Selected clock is divided by 128.
Read = 0b. Must write 0b.
Selects the oscillator to be used as the undivided system clock source.
000: Internal Oscillator
001: External Oscillator
All other values reserved.
R/W
6
0
CLKDIV[2:0]
R/W
5
0
Rev. 1.0
R/W
4
0
Reserved
Function
R
3
0
R/W
2
0
CLKSEL[2:0]
R/W
1
0
R/W
0
0