C8051F707-GMR Silicon Labs, C8051F707-GMR Datasheet - Page 174

• Manufacturer Part Number: C8051F707-GMR
• Description: 8-bit Microcontrollers - MCU 16kB Cap Sense
• Manufacturer: Silicon Labs

Specifications of C8051F707-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F70x/71x
SFR Definition 27.3. OSCICN: Internal H-F Oscillator Control
SFR Address = 0xA9; SFR Page = F
174
Name
Reset
1:0
Bit
Type
7
6
5
4
3
2
Bit
SUSPEND
IFCN[1:0]
STSYNC
IOSCEN
Unused
IFRDY
IOSCEN
Name
SSE
R/W
7
1
Internal H-F Oscillator Enable Bit.
0: Internal H-F Oscillator Disabled.
1: Internal H-F Oscillator Enabled.
Internal H-F Oscillator Frequency Ready Flag.
0: Internal H-F Oscillator is not running at programmed frequency.
1: Internal H-F Oscillator is running at programmed frequency.
Internal Oscillator Suspend Enable Bit.
Setting this bit to logic 1 places the internal oscillator in SUSPEND mode. The inter-
nal oscillator resumes operation when one of the SUSPEND mode awakening
events occurs.
Suspend Timer Synchronization Bit.
This bit is used to indicate when it is safe to read and write the registers associated
with the suspend wake-up timer. If a suspend wake-up source other than Timer 3
has brought the oscillator out of suspend mode, it make take up to three timer clocks
before the timer can be read or written.
0: Timer 3 registers can be read safely.
1: Timer 3 register reads and writes should not be performed.
Spread Spectrum Enable.
Spread spectrum enable bit.
0: Spread Spectrum clock dithering disabled.
1: Spread Spectrum clock dithering enabled.
Read = 0b; Write = Don’t Care
Internal H-F Oscillator Frequency Divider Control Bits.
00: SYSCLK derived from Internal H-F Oscillator divided by 8.
01: SYSCLK derived from Internal H-F Oscillator divided by 4.
10: SYSCLK derived from Internal H-F Oscillator divided by 2.
11: SYSCLK derived from Internal H-F Oscillator divided by 1.
IFRDY
R
6
1
SUSPEND
R/W
5
0
STSYNC
Rev. 1.0
R
4
0
Function
SSE
R/W
3
0
R
2
0
1
0
IFCN[1:0]
R/W
0
0