DS3172N Maxim Integrated, DS3172N Datasheet - Page 142
![no-image](/images/no-image-200.jpg)
DS3172N
Manufacturer Part Number
DS3172N
Description
Network Controller & Processor ICs Dual DS3/E3 Single Chip Transceiver
Manufacturer
Maxim Integrated
Datasheet
1.DS3171.pdf
(234 pages)
Specifications of DS3172N
Part # Aliases
90-31720-N00
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Register Name:
Register Description:
Register Address:
Bit #
Name
Bit #
Name
Bit 2: Transmit Driver Monitor Status (TDM) This bits indicates the status of the transmit monitor circuit in the
transmit LIU.
Bit 1: Receive Loss Of Lock Status (RLOL) This bits indicates the status of the receive LIU clock recovery PLL
circuit.
Bit 0: Performance Monitoring Update Status (PMS) This bits indicates the status of all active performance
monitoring register and counter update signals in this port. It is an “AND” of all update status bits and is not set until
all performance registers are updated and the counters reset. In software update modes, the update request bit
PORT.CR1.PMU should be held high until this status bit goes high.
0 = Transmit output not over loaded
1 = Transmit signal is overloaded
1 = Not locked to the incoming signal
0 = The associated update request signal is low
1 = The requested performance register updates are all completed
0 = Locked to the incoming signal
15
--
--
7
14
--
--
6
PORT.SR
Port Status Register
(0,2,4,6)52h
13
--
--
5
12
--
--
4
142
11
--
--
3
TDM
10
--
2
RLOL
--
9
1
PMS
--
8
0
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