DS3172N Maxim Integrated, DS3172N Datasheet - Page 186
![no-image](/images/no-image-200.jpg)
DS3172N
Manufacturer Part Number
DS3172N
Description
Network Controller & Processor ICs Dual DS3/E3 Single Chip Transceiver
Manufacturer
Maxim Integrated
Datasheet
1.DS3171.pdf
(234 pages)
Specifications of DS3172N
Part # Aliases
90-31720-N00
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Far-End Block Error Count (FBE[15:0]) – These sixteen bits indicate the number of far-end block
errors detected on the incoming DS3 data stream. The associated counter will not increment in M23 DS3 mode.
This register is updated via the PMU signal (see Section 10.4.5).
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: C-bit Parity Error Count (CPE[15:0]) – These sixteen bits indicate the number of C-bit parity errors
detected on the incoming DS3 data stream. The associated counter will not increment in M23 DS3 mode. This
register is updated via the PMU signal (see Section 10.4.5).
CPE15
FBE15
CPE7
FBE7
15
15
0
7
0
0
7
0
CPE14
FBE14
CPE6
FBE6
14
14
0
6
0
0
6
0
T3.RFBECR
T3 Receive Far-End Block Error Count Register
(1,3,5,7)38h
T3.RCPECR
T3 Receive C-bit Parity Error Count Register
(1,3,5,7)3Ah
CPE13
FBE13
CPE5
FBE5
13
13
0
5
0
0
5
0
CPE12
FBE12
CPE4
FBE4
12
12
0
0
0
0
4
4
186
CPE11
FBE11
CPE3
FBE3
11
11
0
3
0
0
3
0
CPE10
FBE10
CPE2
FBE2
10
10
0
2
0
0
2
0
CPE9
CPE1
FBE9
FBE1
9
0
1
0
9
0
1
0
CPE8
CPE0
FBE8
FBE0
8
0
0
0
8
0
0
0
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