72V3644L10PF IDT, 72V3644L10PF Datasheet - Page 2

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72V3644L10PF

Manufacturer Part Number
72V3644L10PF
Description
FIFO
Manufacturer
IDT
Datasheet

Specifications of 72V3644L10PF

Part # Aliases
IDT72V3644L10PF
DESCRIPTION:
versions of the IDT723624/723634/723644, designed to run off a 3.3V supply
for exceptionally low-power consumption. These devices are monolithic, high-
speed, low-power, CMOS bidirectional synchronous (clocked) FIFO memory
which supports clock frequencies up to 100 MHz and has read access times as
PIN CONFIGURATION
IDT72V3624/72V3634/72V3644 3.3V CMOS SyncBiFIFO
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
The IDT72V3624/72V3634/72V3644 are pin and functionally compatible
BE/FWFT
INDEX
W/RA
CLKA
GND
GND
GND
GND
GND
ENA
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
Vcc
Vcc
Vcc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
TQFP (PK128-1, order code: PF)
TM
WITH BUS-MATCHING
TOP VIEW
2
fast as 6.5ns. Two independent 256/512/1,024 x 36 dual-port SRAM FIFOs
on board each chip buffer data in opposite directions. FIFO data on Port B can
be input and output in 36-bit, 18-bit, or 9-bit formats with a choice of Big- or Little-
Endian configurations.
employs a synchronous interface. All data transfers through a port are gated
to the LOW-to-HIGH transition of a port clock by enable signals. The clocks for
These devices are a synchronous (clocked) FIFO, meaning each port
COMMERCIAL TEMPERATURE RANGE
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
4664 drw02
CLKB
PRS2
Vcc
B35
B34
B33
B32
GND
GND
B31
B30
B29
B28
B27
B26
Vcc
B25
B24
BM
GND
B23
B22
B21
B20
B19
B18
GND
B17
B16
SIZE
Vcc
B15
B14
B13
B12
GND
B11
B10

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