72V3644L10PF IDT, 72V3644L10PF Datasheet - Page 29

• Manufacturer Part Number: 72V3644L10PF
• Description: FIFO
• Manufacturer: IDT

Specifications of 72V3644L10PF

• Part # Aliases: IDT72V3644L10PF

NOTES:
1. t
2. If Port B size is word or byte, FFB is set LOW by the last word or byte write of the long word, respectively.
IDT72V3624/72V3634/72V3644 3.3V CMOS SyncBiFIFO
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
B0-B35
A0-A35
CLKB
CLKB edge is less than t
CLKA
W/RA
W/RB
SKEW1
MBA
ENA
MBB
CSA
CSB
ENB
EFA
FFB
is the minimum time between a rising CLKA edge and a rising CLKB edge for FFB to transition HIGH in the next CLKB cycle. If the time between the rising CLKA edge and rising
LOW
LOW
FIFO2 Full
LOW
LOW
HIGH
LOW
Previous Word in FIFO2 Output Register
t
CLKH
SKEW1
Figure 22. FFB
, then FFB may transition HIGH one CLKB cycle later than shown.
t
CLK
t
ENS2
t
CLKL
FFB
FFB
FFB
FFB Flag Timing and First Available Write when FIFO2 is Full (IDT Standard Mode)
t
t
SKEW1
ENH
t
A
(1)
TM
1
t
CLKH
WITH BUS-MATCHING
t
CLK
29
t
CLKL
2
t
Next Word From FIFO2
WFF
t
t
ENS2
ENS2
t
DS
COMMERCIAL TEMPERATURE RANGE
To FIFO2
Write
t
WFF
t
t
t
ENH
DH
ENH
4664 drw24